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S93462S2.7 查看數據表(PDF) - Summit Microelectronics

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S93462S2.7 Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
S93462/S93463
SK
CS
DI
1
00
10
STATUS VERIFY
tCS
STANDBY
HIGH-Z
DO
tSV
BUSY
t EW
READY
t HZ
HIGH-Z
Figure 6. ERAL Instruction Timing
2021 ILL 8 1.0
SK
CS
DI
1
000 1
DO
DN
DO
STATUS VERIFY
tCS
STANDBY
tSV
BUSY
t EW
READY
t HZ
HIGH-Z
Figure 7. WRAL Instruction Timing
2021 ILL 10 1.0
INSTRUCTION SET
Instruction
Start
Bit
READ
1
ERASE
1
WRITE
1
EWEN
1
EWDS
1
ERAL
1
WRAL
1
Opcode
10
11
01
00
00
00
00
Address
x8
x16
A6A0 A5A0
A6A0 A5A0
A6A0 A5A0
11xxxxx 11xxxx
00xxxxx 00xxxx
10xxxxx 10xxxx
01xxxxx 01xxxx
Data
x8
D7D0
D7D0
Comments
x16
Read Address ANA0
Clear Address ANA0
D15D0 Write Address ANA0
Write Enable
Write Disable
Clear All Addresses
D15D0
Write All Addresses
2021 PGM T5 1.1
6
2021 4.2 1/23/01
Summit Microelectronics, Inc.

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