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SC18IM700IPW,112 查看數據表(PDF) - NXP Semiconductors.

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SC18IM700IPW,112
NXP
NXP Semiconductors. NXP
SC18IM700IPW,112 Datasheet PDF : 24 Pages
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SC18IM700
Master I2C-bus controller with UART interface
Rev. 3 — 12 October 2017
Product data sheet
1. General description
The SC18IM700 is designed to serve as an interface between the standard UART port of
a microcontroller or microprocessor and the serial I2C-bus; this allows the microcontroller
or microprocessor to communicate directly with other I2C-bus devices. The SC18IM700
can operate as an I2C-bus master. The SC18IM700 controls all the I2C-bus specific
sequences, protocol, arbitration and timing. The host communicates with SC18IM700 with
ASCII messages protocol; this makes the control sequences from the host to the
SC18IM700 become very simple.
2. Features and benefits
UART host interface
I2C-bus controller
Eight programmable I/O pins
High-speed UART: baud rate up to 460.8 kbit/s
High-speed I2C-bus: 400 kbit/s
16-byte TX FIFO
16-byte RX FIFO
Programmable baud rate generator
2.4 V and 3.6 V operation
Sleep mode (power-down)
UART message format resembles I2C-bus transaction format
I2C-bus master functions
Multi-master capability
5 V tolerance on the input pins
8 N 1 UART format (8 data bits, no parity bit, 1 stop bit)
Available in very small TSSOP16 package
3. Applications
Enable I2C-bus master support in a system
I2C-bus instrumentation and control
Industrial control
Medical equipment
Cellular telephones
Handheld computers

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