STLC4420A 查看數據表（PDF） - STMicroelectronics
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STLC4420A Datasheet PDF : 40 Pages
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Pin descriptions
STLC4420A
Table 1. STLC4420A signal descriptions (continued)
Pin name Pin number
Type
Internal
resistor
Function
GP2_10
C17
GP2_9
C18
GP1_4
C23
GP2_8
A22
I_TEST-
B9
I_TEST+
A9
Q_TEST-
B10
Q_TEST+
A10
VCO_CAP A7
1.8V (VDDD)
GPIO
1.8V (VDDD)
GPIO
1.8V (VDDD)
GPIO
1.8V (VDDD)
GPIO
Reserved
Miscellaneous
VCO_LOOP A5
Miscellaneous
EMU_SCL
D23
EMU_SDA C24
Miscellaneous
Miscellaneous
RSRV_GND K24
Reserved
RSRV_NC
TCLK
TDI
TDO
TMS
TRSTN
D14, D16,
G14, H14,
H16, J14,
K16, L1, L2,
L4, L5, L7, Reserved
M4, M8, M10,
N19, N23,
F23, L21, L19,
K14
L20
JTAG
K22
JTAG
H24
JTAG
N20
JTAG
N22
JTAG
No Pull
No Pull
No Pull
No Pull
-
-
-
-
-
-
-
Firmware controlled 1.8V digital GPIO
Assigned to ARM MAC GP2-10. Float for
proper operation.
Firmware controlled 1.8V digital GPIO
Assigned to ARM MAC GP2-9. Float for
proper operation.
Firmware controlled 1.8V digital GPIO
Assigned to ARM MAC GP1-4. Float for
proper operation.
Firmware controlled 1.8V digital GPIO
Assigned to ARM MAC GP2-8. Float for
proper operation.
Reserved analog test pins -- float for proper
operation.
RF VCO core decoupling pin. Decouple this
pin through a ceramic capacitor to VDD_VCO
pin A6. Refer to evaluation platform
schematics for optimal capacitor value.
VCO loop filter pin. Connect this pin to thru a
loop filter network to VDD_VCO pin A6. Refer
to evaluation platform schematics for optimal
filter network.
Optional EMU programming I2C clock
Optional EMU programming I2C
data/address
Reserved pin. Connect to ground plane for
proper operation.
-
Reserved pins. Float for proper operation.
Pull-Up
No-Pull
No-Pull
Pull-Up
Pull-Up
JTAG clock
JTAG data input
JTAG data output
JTAG test mode select
JTAG reset
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