TDA8003TS/C1 查看數據表（PDF） - Philips Electronics
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TDA8003TS/C1 Datasheet PDF : 24 Pages
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Philips Semiconductors
I2C-bus SIM card interface
Product specification
TDA8003TS
Table 2 Description of the command bits; (all bits are cleared at reset)
SYMBOL
BIT
DESCRIPTION
START/STOP
0
Logic 1 initiates an activation sequence and a cold reset procedure. Logic 0 initiates a
deactivation sequence.
WARM
1
Logic 1 initiates a warm reset procedure. TDA8003TS/C1: warm reset performed only
when the 2 times 45000 CLK pulses have expired without answer from the card.
TDA8003TS/C2: warm reset performed whatever the card has answered or not at the
cold reset procedure but the count is 2 times 44745 CLK pulses.
3 V/5 VN
PDOWN
2
Logic 1 sets the card supply voltage VCC to 3 V. Logic 0 sets VCC to 5 V.
3
Logic 1 applies on CLK the frequency defined by bits CLKPD1 and CLKPD2, and
enters a reduced consumption mode. Logic 0 sets the circuit back to normal mode.
CLKPD1
4
Bits 4 and 5 determine the clock to the card at power-down as shown in Table 3.
CLKPD2
DT/DFN
I/OEN
5
6
Logic 1 sets fCLK to 1⁄2fSIMCLK (in active mode). Logic 0 sets fCLK to 1⁄4fSIMCLK.
7
Logic 1 will transfer I/O to SIMI/O. Logic 0 sets I/O and SIMI/O to high-impedance.
Table 3 Clock to the card at power-down
BIT 4
0
0
1
1
BIT 5
0
1
0
1
clock stop LOW
clock stop HIGH
clock is 1⁄2fosc
no change
FUNCTION
Table 4 Description of the status bits; note 1
SYMBOL
PRES
PRESL
−
SUPL
PROT
MUTE
EARLY
ACTIVE
BIT
DESCRIPTION
0
Logic 1 when the card is present. Logic 0 when the card is not present.
1
Logic 1 when the card has been extracted or inserted. Logic 0 when the status is
read-out.
2
Bit 2 is not used and is fixed to logic 0.
3
Logic 1 when the voltage supervisor has signalled a fault. Logic 0 when the status is
read-out.
4
Logic 1 when an overload has occurred during a session. Logic 0 when the status is
read-out.
5
TDA8003TS/C1: Logic 1 when a card has not answered after 2 times 45000 CLK
pulses. Logic 0 when the status is read-out.
TDA8003TS/C2: Same as for C1, but the count is 2 times 44745 CLK pulses.
6
Logic 1 when a card has answered between 200 and 352 CLK cycles. Logic 0 when
the status is read-out.
7
Logic 1 when the card is power-on. Logic 0 when the card is power-off.
Note
1. In case of card extraction, supply drop-out or overload detection within a session, the card will be automatically
deactivated, SIMERR pulled LOW, bit START = 0 and the corresponding status bit = 1. The status bit will be logic 0
and SIMERR will be released when the microcontroller reads out the status register, on the 7th SCL pulse. After a
supply drop-out, SIMERR will be released at the end of the alarm pulse and bit SUPL = 1.
2000 Apr 20
7
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