VSC7216UC-01 查看數據表（PDF） - Vitesse Semiconductor

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VSC7216UC-01

Multi-Gigabit Interconnect Chip

Vitesse Semiconductor 

VITESSE

SEMICONDUCTOR CORPORATION

Preliminary Datasheet

VSC7216-01

Multi-Gigabit Interconnect Chip

Pin

1R, 2R

1M, 2M

1J, 2J

1F, 2F

1T, 2T

1N, 2N

1H, 2H

1E, 2E

4N

4M

4J

4H

3P

3N

3H

3G

18P, 19R

20U, 20V

17R, 19U

20W, 18T

15V, 15U

18Y, 17Y

15W, 14U

16Y, 13V

16C, 15C

15D, 18A

17A, 15B

14D, 16A

20E, 18G

17G, 19F

20C, 17F

19D, 20B

17N

18W

17C

19H

19P

16V

16D

18H

18N

16U

20A

20F

Name

PTXA+/-

PTXB+/-

PTXC+/-

PTXD+/-

RTXA+/-

RTXB+/-

RTXC+/-

RTXD+/-

PTXENA

PTXENB

PTXENC

PTXEND

RTXENA

RTXENB

RTXENC

RTXEND

I/O Type

Pin Description

Primary differential serial TX outputs for channel n. These pins output

O PECL serialized transmit data when PTXENn is HIGH. AC-coupling is

recommended.

Redundant differential serial TX outputs for channel n. These pins output

O PECL serialized transmit data when RTXENn is HIGH. AC-coupling is

recommended.

I

TTL

Primary TX output ENable for channel n. When HIGH PTXn+/- is active;

when LOW, PTXn+/- is powered down and the outputs are un-driven.

I

TTL

Redundant TX output ENable for channel n. When HIGH, RTXn+/- is

active; when LOW, RTXn+/- is powered down and the outputs are un-driven.

RA(7:0)

O

TTL

Receive data for channel A. Synchronous to RCLKA/RCLKNA or REFCLK

as selected by RMODE(1:0).

RB(7:0)

O

TTL

Receive data for channel B. Synchronous to RCLKB/RCLKNB or REFCLK

as selected by RMODE(1:0).

RC(7:0)

O

TTL

Receive data for channel C. Synchronous to RCLKC/RCLKNC or REFCLK

as selected by RMODE(1:0).

RD(7:0)

IDLEA

IDLEB

IDLEC

IDLED

KCHA

KCHB

KCHC

KCHD

ERRA

ERRB

ERRC

ERRD

O

TTL

Receive data for channel D. Synchronous to RCLKD/RCLKND or REFCLK

as selected by RMODE(1:0).

IDLE detect for channel n. When HIGH, an IDLE character has been

O TTL detected by the decoder and is on Rn(7:0).

When ENDEC=LOW, this is equivalent to COMDETn.

Kxx.x CHaracter detect for channel n. When HIGH, a special Kxx.x

O TTL character has been detected by the decoder and is on Rn(7:0).

When ENDEC=LOW, this is equivalent to data bit Rn8.

ERRor detect for channel n. When HIGH, an invalid 10-bit character or

O TTL disparity error has been detected and the data on Rn(7:0) is invalid.

When ENDEC=LOW, this is equivalent to data bit Rn9.

G52352-0, Rev 3.2

05/05/01

© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012

Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com

Internet: www.vitesse.com

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