WC32P040-25P4M 查看數據表（PDF） - White Electronic Designs Corporation

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产品描述 (功能)

生产厂家

WC32P040-25P4M

32-Bit Nonmultiplexed External Address and Data Buses

White Electronic Designs Corporation 

White Electronic Designs

WC32P040-XXM

INSTRUCTION SET SUMMARY (contd)

Opcode

ORI

ORI to CCR

ORI to SR

PACK

PEA

PFLUSH

PTEST

RESET

ROL, ROR

ROXL, ROXR

RTD

RTE

RTR

RTS

SBCD

Scc

STOP

SUB

SUBA

SUBI

SUBQ

Operation

Syntax

Immediate Data V Destination Destination

ORI #<data>,<ea>

Source V CCR CCR

ORI #<data>,CCR

If supervisor state

then Source V SR SR

else TRAP

ORI #<data>,SR

Source (Unpacked BCD) + adjustment Destination (Packed BCD) PACK -(Ax),-(Ay),#(adjustment)

PACK Dx,Dy,#(adjustment)

SP – 4 SP; <ea> (SP)

PEA <ea>

If supervisor state

then invalidate instruction and data ATC entries

for destination address

else TRAP

PFLUSH (An)

PFLUSHN (An)

PFLUSHA

PFLUSHAN

If supervisor state

then logical address status MMUSR; entry ATC

else TRAP

PTESTR (An)

PTESTW (An)

If supervisor state

then Assert RSTO# Line

else TRAP

RESET

Destination Rotated by count Destination

ROd Rx,Dy(1)

ROd #<data>,Dy(1)

Destination Rotated with X by count Destination

ROXd Dx,Dy(1)

ROXd #<data>,Dy(1)

ROXd <ea>(1)

(SP) PC; SP + 4 + dn SP

RTD #(dn)

If supervisor state

RTE

then (SP) SR; SP + 2 SP; (SP) PC; SP + 4 SP;

restore state and deallocate stack according to (SP)

else TRAP

(SP) CCR; SP + 2 SP;

RTR

(SP) PC; SP + 4 SP

(SP) PC; SP + 4 SP

RTS

Destination10 – Source10 – X Destination

SBCD Dx,Dy

SBCD –(Ax),–(Ay)

If condition true

then 1s Destination

else 0s Destination

Scc <ea>

If supervisor state

then Immediate Data SR; STOP

elseTRAP

STOP #<data>

Destination – Source Destination

SUB <ea>,Dn

SUB Dn,<ea>

Destination – Source Destination

SUBA <ea>,An

Destination – Immediate Data Destination

SUBI #<data>,<ea>

Destination – Immediate Data Destination

SUBQ #<data>,<ea>

July 1998

9

White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

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