WM8141CFT/V 查看數據表（PDF） - Wolfson Microelectronics plc
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WM8141CFT/V Datasheet PDF : 31 Pages
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WM8141
PARALLEL INTERFACE
Production Data
tSTB
STB
tASU
Hi-Z
OP[11:4] ADC DATA OUT
tAH
ADDRESS IN
tDSU
DATA IN
tDH
Hi-Z
tSTDO
ADC DATA OUT
DNA
tADLS
tADLH tADHS
tADHH
tOPZ
RNW
tOPD
tSTAO
REG. DATA OUT
ADC DATA OUT
Figure 5 Parallel Interface Diagram
Test Conditions
AVDD = DVDD1 = DVDD2 = 4.75 to 5.25V, AGND = DGND = 0V, TA = 0 to 70°C, MCLK = 12MHz unless otherwise stated
PARAMETER
SYMBOL TEST CONDITIONS
MIN
RNW low to OP[11:4] tri-state.
tOPZ
Address set-up time to STB low
tASU
0
DNA low set-up time to STB low
tADLS
10
Strobe low time
tSTB
50
Address hold time from STB high
tAH
10
DNA low hold time from STB high
tADLH
10
Data set-up time to STB low
tDSU
0
DNA high set-up time to STB low
tADHS
10
Data hold time from STB high
tDH
10
Data high hold time from STB high
tADHH
10
RNW high to OP[11:4] output
tOPD
Data output propagation delay from STB
low
tSTDO
ADC data out propagation delay from
STB high
tSTAO
TYP
MAX
UNITS
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
35
ns
35
ns
35
ns
Note: Parameters are measured at 50% of the rising/falling edge.
WOLFSON MICROELECTRONICS LTD
PD Rev 3.0 October 2000
10
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