WM8141CFT/V 查看數據表（PDF） - Wolfson Microelectronics plc
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WM8141CFT/V Datasheet PDF : 31 Pages
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Production Data
WM8141
Test Conditions
AVDD = DVDD1 = DVDD2 = 4.75 to 5.25V, AGND = DGND = 0V, TA = 0 to 70°C, MCLK = 12MHz unless otherwise stated.
PARAMETER
SYMBOL
VRLC/Reset-Level Clamp (RLC)
RLC switching impedance
VRLC short-circuit current
VRLC output resistance
VRLC Hi-Z leakage current
RLCDAC resolution
RLCDAC step size, RLCDAC = 0
VRLCSTEP
RLCDAC step size, RLCDAC = 1
VRLCSTEP
RLCDAC output voltage at
code 0(hex), RLCDACRNG = 0
VRLCBOT
RLCDAC output voltage at
code 0(hex), RLCDACRNG = 1
VRLCBOT
RLCDAC output voltage at
code F(hex) RLCDACRNG, = 0
VRLCTOP
RLCDAC output voltage at
code F(hex), RLCDACRNG = 1
VRLCTOP
Offset DAC, Monotonicity Guaranteed
Resolution
Differential non-linearity
DNL
Integral non-linearity
INL
Step size
Output voltage
Programmable Gain Amplifier
Resolution
Gain
TEST
CONDITIONS
Code 00(hex)
Code FF(hex)
MIN
TYP
MAX
50
5
2
1
4
0.24
0.16
0.4
0.25
4.2
2.85
8
0.1
0.5
0.25
1
2.04
-260
+260
8
208
283 − PGA[7 : 0]
Max gain, each channel
Min gain, each channel
Gain error, each channel
Supply Currents
Total supply current – active
Total analogue supply current –
active
Digital logic supply current,
DVDD1 – active
Digital I/O supply current,
DVDD2 – active
Supply current – full power down
mode
GMAX
GMIN
IAVDD
7.4
0.74
1
5
45
65
42
2
1
10
Notes: 1. Full-scale input voltage denotes the maximum amplitude of the input signal at the specified gain.
2. Input signal limits are the limits within which the full-scale input voltage signal must lie.
UNIT
Ω
mA
Ω
µA
bits
V/step
V/step
V
V
V
V
bits
LSB
LSB
mV/step
mV
mV
bits
V/V
V/V
V/V
%
mA
mA
mA
mA
µA
WOLFSON MICROELECTRONICS LTD
PD Rev 3.0 October 2000
5
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