28C256 查看數據表（PDF） - Xicor -> Intersil

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28C256

32K x 8 Bit 5 Volt, Byte Alterable E2PROM

Xicor -> Intersil 

X28C256

SOFTWARE DATA PROTECTION

Figure 6. Timing Sequence—Byte or Page Write

VCC

0V

CE

DATA AA

ADDR. 5555

55

2AAA

WE

A0

5555

tWPH2

tWC

WRITES

OK

≤tBLC MAX

BYTE

OR

PAGE

(VCC)

WRITE

PROTECTED

3855 FHD F16

Figure 7. Write Sequence for

Software Data Protection

WRITE DATA AA

TO ADDRESS

5555

WRITE DATA 55

TO ADDRESS

2AAA

WRITE DATA A0

TO ADDRESS

5555

WRITE DATA XX

TO ANY

ADDRESS

BYTE/PAGE

LOAD ENABLED

Regardless of whether the device has previously been

protected or not, once the software data protection

algorithm is used and data has been written, the X28C256

will automatically disable further writes unless another

command is issued to cancel it. If no further commands

are issued the X28C256 will be write protected during

power-down and after any subsequent power-up.

Note: Once initiated, the sequence of write operations

should not be interrupted.

WRITE LAST

BYTE TO

LAST ADDRESS

AFTER tWC

RE-ENTERS DATA

PROTECTED STATE

3855 FHD F17

7

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