X28HC64 查看數據表（PDF） - Xicor -> Intersil

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X28HC64

5 Volt, Byte Alterable E2PROM

Xicor -> Intersil 

X28HC64

SOFTWARE DATA PROTECTION

Figure 6. Timing Sequence—Byte or Page Write

VCC

0V

DATA

ADDR

CE

AA

1555

55

0AAA

WE

A0

1555

WRITES

OK

tWC

≤tBLC MAX

BYTE

OR

PAGE

(VCC)

WRITE

PROTECTED

3857 FHD F16

Figure 7. Write Sequence for

Software Data Protection

WRITE DATA AA

TO ADDRESS

1555

WRITE DATA 55

TO ADDRESS

0AAA

WRITE DATA A0

TO ADDRESS

1555

WRITE DATA XX

TO ANY

ADDRESS

WRITE LAST

BYTE TO

LAST ADDRESS

BYTE/PAGE

LOAD ENABLED

OPTIONAL BYTE

OR PAGE WRITE

ALLOWED

Regardless of whether the device has previously been

protected or not, once the software data protection

algorithm is used, the X28HC64 will automatically dis-

able further writes unless another command is issued to

deactivate it. If no further commands are issued the

X28HC64 will be write protected during power-down

and after any subsequent power-up.

Note: Once initiated, the sequence of write operations

should not be interrupted.

AFTER tWC

RE-ENTERS DATA

PROTECTED STATE

3857 FHD F17

7

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