X88C64 查看數據表（PDF） - Xicor -> Intersil
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X88C64 Datasheet PDF : 14 Pages
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X88C64
WR Controlled Write Cycle
Symbol
Parameter
tLHLL
tAVLL
tLLAX
tDVWH
tWHDX
tELLL
tWLWH
tWRS
tWRH
tBLC
tWC (7)
ALE Pulse Width
Address Setup Time
Address Hold Time
Data Setup Time
Data Hold Time
Chip Enable Setup Time
WR Pulse Width
WR Setup Time
WR Hold Time
Byte Load Time (Page Write)
Write Cycle Time
WR Controlled Write Timing Diagram
Min.
80
20
30
50
30
7
120
30
20
0.5
Max.
100
5
CE
ALE
A/D0–A/D7
A8–A12
WR
tLHLL
tELLL
tAVLL
AIN
tLLAX
tWRS
tWRH
tWRH
tWLWH
DIN
tDVWH
tWHDX
ADDRESS
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ms
3867 PGM T11
3867 FHD F07
Note: (7) tWC is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum
time the device requires to automatically complete the internal write operation.
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