APL5155 查看數據表（PDF） - Anpec Electronics
零件编号
产品描述 (功能)
生产厂家
APL5155 Datasheet PDF : 20 Pages
| |||
APL5155
Application Information
Enable/Shutdown
The APL5155 features an active-high enable pin that al-
lows the regulator to be disabled. Forcing the enable pin
low disables the regulator, so current consumed by the
regulator goes nearly to zero. Forcing the enable pin high
enables the output voltage. The enable pin can not float.
Input Capacitor
The APL5155 has high input voltage up to 25V. The input
capacitor must be rated to sustain voltages that may be
used on the input. An input capacitor may be required
when the device is not near the source power supply or
when supplied by a battery. Small and surface-mounted
ceramic capacitors can be used for bypassing. A larger
value may be required if the source supply has high ripple.
PD(MAX)
=
TJ − TA
θJA
where T -T is the temperature difference between the
JA
junction and ambient air. θJA is the thermal resistance
between junction and ambient air.
For continual operation, do not exceed the absolute maxi-
mum junction temperature rating of TJ=125oC.
For example:
In SOT-23-5 package θJA=235oC/W. When operates the
APL5155 at TA=50oC, the maximum power dissipation
can be determined as below:
P =(125oC-50oC)/(235oC/W)
D(MAX)
P =319.1mW
D(MAX)
Thermal Pad Consideration
Output Capacitor
The APL5155 requires an output capacitor for stability.
The design requires 1µF or greater on the output to main-
tain stability. It is optimized by using low-ESR ceramic
chip capacitors. The maximum allowable ESR is 3Ω. More
capacitance improves transient response. Place the out-
put capacitor as close to the VOUT pin as possible.
X7R/X5R dielectric-type ceramic capacitors are recom-
mended because of their temperature performance. X7R
type capacitors change capacitance by 15% over their
operating temperature ranges. To use a ceramic chip
capacitor with Y5V dielectric, the value must be much
higher than an X7R ceramic capacitor to ensure the same
minimum capacitance over the equivalent operating tem-
perature range.
The SOP-8P is a cost-effective package which features a
small size, like a standard SOP-8, and a bottom thermal
pad to minimize the thermal resistance of the package is
applicable to high current applications. The thermal pad
must be soldered down to the copper plane on circuit
board. Heat can be conducted away from the thermal
pad through the copper plane to ambient. If the copper
plane is not on the top surface of the circuit board, 4 or 6
vias should be used to thermally couple the thermal pad
to the bottom plane.
For good thermal conduction, the vias must be plated
through and solder filled. The copper plane used to con-
duct heat away from the thermal pad should be as large
as practical.
0.072
0.118
No-Load Stability
0.024
The APL5155 will remain stable and in regulation with no
load unlike many other voltage regulators. This is espe-
cially important in CMOS RAM keep-alive applications.
0.150
Thermal Consideration
The thermal resistance of junction to ambient controls
the APL5155's maximum power dissipation. The power
dissipation across the device is PD=IOUT (VIN-VOUT), and the
maximum power dissipation is:
0.212
SOP-8P Layout Recommendation
ground
plane for
thermal
pad
Copyright © ANPEC Electronics Corp.
11
Rev. A.3 - Sep., 2012
www.anpec.com.tw
Share Link: 