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AD5445BCP(2002) 查看數據表(PDF) - Analog Devices

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AD5445BCP Datasheet PDF : 12 Pages
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PRELIMINARY TECHNICAL DATA
AD5424/AD5433/AD5445–SPECIFICATIONS1
TIMING CHARACTERISTICS1,2 (VDD = 2.5 V to 5.5 V, VREF = +5 V, IOUT2 = O V. All specifications TMIN to TMAX unless
otherwise noted.)
Parameter
t1
t2
t3
t4
t5
t6
t7
t8
t9
Limit at TMIN, TMAX
0
0
10
6
0
5
7
5
25
5
10
Units
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns typ
ns max
ns typ
ns max
Conditions/Comments
R/W to CS Setup Time
R/W to CS Hold Time
CS Low Time (Write Cycle)
Data Setup Time
Data Hold Time
R/W high to CS low
CS Min High Time
Data Acess Time
Bus Relinquish Time
NOTES
1See Figure 1. Temperature range is as follows: B Version: –40°C to +105°C. Guaranteed by design and characterisation, not subject to production test.
2All input signals are specified with tr =tf = 5ns (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2. Digital Output timing measured with Load circuit in
Figure 2.
Specifications subject to change without notice.
R/W
CS
DATA
t1
t2
t6
t3
t4
DATA VALID
t7
t5
t2
t8
t9
DATA VALID
Figure 1. Timing Diagram.
TO
OUTPUT
PIN
200uA
IOL
CL
50pF
200uA
IOH
VOH (MIN) + VOL (MAX)
2
Figure 2. Load Circuit for Data Output Timing Specifications
–4–
REV. PrH

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