AD5445 查看數據表（PDF） - Analog Devices
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AD5445 Datasheet PDF : 32 Pages
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AD5424/AD5433/AD5445
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
IOUT1 1
IOUT2 2
GND 3
DB7 4
DB6 5
DB5 6
DB4 7
DB3 8
AD5424
(Not to Scale)
16 RFB
15 VREF
14 VDD
13 R/W
12 CS
11 DB0 (LSB)
10 DB1
9 DB2
20 19 18 17 16
GND 1
DB7 2
DB6 3
DB5 4
DB4 5
PIN 1
INDICATOR
AD5424
TOP VIEW
15 R/W
14 CS
13 NC
12 NC
11 NC
6 7 8 9 10
Figure 3. AD5424 Pin Configuration (TSSOP)
NC = NO CONNECT
Figure 4. AD5424 Pin Configuration (LFCSP)
Table 4. AD5424 Pin Function Descriptions
Pin No.
TSSOP LFCSP Mnemonic Description
1
19
IOUT1
2
20
IOUT2
3
1
GND
DAC Current Output.
DAC Analog Ground. This pin should normally be tied to the analog ground of the system.
Ground.
4–11 2–9 DB7–DB0 Parallel Data Bits 7 to 0.
10–13 NC
No Internal Connection.
12
14
CS
Chip Select Input. Active low. Used in conjunction with R/W to load parallel data to the input latch or to
read data from the DAC register. Rising edge of CS loads data.
13
15
R/W
Read/Write. When low, use in conjunction with CS to load parallel data. When high, use with CS to read
back contents of DAC register.
14
16
VDD
Positive Power Supply Input. These parts can be operated from a supply of 2.5 V to 5.5 V.
15
17
VREF
DAC Reference Voltage Input Terminal.
16
18
RFB
DAC Feedback Resistor Pin. Establish voltage output for the DAC by connecting to external amplifier
output.
Rev. B | Page 7 of 32
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