CS48500 查看數據表（PDF） - Cirrus Logic

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CS48500

32-bit Audio Decoder DSP Family

Cirrus Logic 

CS48500 Data Sheet

32-bit Audio Decoder DSP Family

List of Figures

Figure 1. RESET Timing .........................................................................................................................14

Figure 2. XTI Timing................................................................................................................................15

Figure 3. Serial Control Port - SPI Slave Mode Timing...........................................................................16

Figure 4. Serial Control Port - SPI Master Mode Timing.........................................................................17

Figure 5. Serial Control Port - I2C Slave Mode Timing ...........................................................................18

Figure 6. Serial Control Port - I2C Master Mode Timing .........................................................................19

Figure 7. Digital Audio Input (DAI) Port Timing Diagram ........................................................................20

Figure 8. Direct Stream Digital - Serial Audio Input Timing.....................................................................21

Figure 9. Direct Stream Digital - Serial Audio Input Timing for Phase Modulation Mode........................21

Figure 10. Digital Audio Output Data, Input and Output Clock Timing....................................................22

Figure 11. Digital Audio Port Timing, MCLK Master Mode .....................................................................22

T Figure 12. CS48520, 48-Pin LQFP Pinout ..............................................................................................24

Figure 13. CS48540, 48-Pin LQFP Pinout ..............................................................................................25

F Figure 14. CS48560, 48-Pin LQFP Pinout ..............................................................................................26

List of Tables DRA Figure 15. 48-Pin LQFP Package Drawing .............................................................................................27

Table 1. CS48500 Related Documentation...............................................................................................5

Table 2. Device and Firmware Selection Guide........................................................................................8

L I Table 3. Ordering Information .................................................................................................................23

CONFIDENTDIEALPH Table 4. Environmental, Manufacturing, & Handling Information............................................................23

4

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