LCMXO1200E-3MN100I 查看數據表（PDF） - Lattice Semiconductor

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LCMXO1200E-3MN100I

MachXO Family Data Sheet

Lattice Semiconductor 

Lattice Semiconductor

Figure 2-1. Top View of the MachXO1200 Device1

Architecture

MachXO Family Data Sheet

PIOs Arranged into

sysIO Banks

sysMEM Embedded

Block RAM (EBR)

Programmable

Functional Units

with RAM (PFUs)

Programmable

Functional Units

without RAM (PFFs)

sysCLOCK

PLL

JTAG Port

1. Top view of the MachXO2280 device is similar but with higher LUT count, two PLLs, and three EBR blocks.

Figure 2-2. Top View of the MachXO640 Device

PIOs Arranged into

sysIO Banks

Programmable

Function Units

without RAM (PFFs)

Programmable

Function Units

with RAM (PFUs)

JTAG Port

2-2

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