M52347FP 查看數據表（PDF） - Renesas Electronics
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M52347FP Datasheet PDF : 17 Pages
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M52347SP/FP
Pin Description (cont.)
Pin
No.
Name
10 V.TIME
GATE SW
DC Voltage
(V)
3.2 V
when open
11 V S/S IN
Peripheral Circuit
0.1 mA
2.5 V
20 kΩ
10
30 kΩ
0.1 mA
11
1 kΩ
7.5 kΩ
5.5 kΩ
1 kΩ
4 kΩ
Function
V TIME GATE SW pin
Can select whether to output the pulse
of VD portion from pin 14, 15 output
pulse.
The threshold voltage is approx. 2.5 V.
VTH L = 0 to 2 V
VTH H = 3 to 5 V
V S/S IN pin
Inputs a signal of having externally
integrated composite sync for V sync
separation.
12 V S/S OUT
13 VD+OUT
14 HD+OUT
15 HD−OUT
16 VCC
17 CLAMP+
OUT
18 H.POL.
5V
0 VDC or
5 VDC
19 V.POL.
0 VDC or
5 VDC
20 CLAMP
TIMING
3.0 V
1.9 V
20
20 kΩ
1.75 kΩ
0.2 mA 0.2 mA
1 kΩ
12
Same as pin 12
Same as pin 12
Same as pin 12
Same as pin 12
Same as pin 1
Same as pin 1
4 kΩ
4 kΩ
3V
1.9 V
V S/S pulse output pin
No problem occurs when current of
approx. 6 mA flows to internal part of
the IC. To improve the rising speed,
connect a resistance between power
supplies.
VD+ pulse output pin
Same as pin 12
HD+ pulse output pin
Same as pin 12
HD− pulse output pin
Same as pin 12
Power supply
CLAMP+ pulse output pin
Same as pin 12
Logic output pin for horizontal
synchronous signal
When pin 6 input signal is POSI,
outputs "L"; when NON, outputs "L";
and when NEG, outputs "H".
Logic output pin for vertical
synchronous signal
When pin 8 input signal is POSI,
outputs "L"; when NON, outputs "L";
and when NEG, outputs "H".
CLAMP TIMING pin
The clamp pulse width is determined
depending on the external resistance
and capacitance. As the resistance
value and capacitance value are
larger, the clamp pulse width is wider.
0.4 mA
0.2 mA
Rev.2.00 Sep 14, 2006 page 8 of 16
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