MAX1717(2000) 查看數據表（PDF） - Maxim Integrated

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MAX1717
(Rev.:2000)

Dynamically Adjustable, Synchronous Step-Down Controller for Notebook CPUs

Maxim Integrated 

Dynamically Adjustable, Synchronous

Step-Down Controller for Notebook CPUs

ELECTRICAL CHARACTERISTICS (continued)

(Circuit of Figure 1, V+ = +15V, VCC = VDD = SKP/SDN = +5V, VOUT =1.6V, TA = -40°C to +85°C, unless otherwise noted.) (Note 3)

PARAMETER

CONDITIONS

MIN TYP MAX UNITS

Quiescent Supply Current (VCC) Measured at VCC, FB forced above the regulation point

1200 µA

Quiescent Supply Current (VDD) Measured at VDD, FB forced above the regulation point

5

µA

Quiescent Battery Supply

Current (V+)

40

µA

Shutdown Supply Current (VCC) SKP/SDN = 0

Shutdown Supply Current (VDD) SKP/SDN = 0

5

µA

5

µA

Shutdown Battery Supply

Current (V+)

SKP/SDN = 0, VCC = VDD = 0 or 5V

5

µA

Reference Voltage

Overvoltage Trip Threshold

VCC = 4.5V to 5.5V, no REF load

Measured at FB

1.98

2.02

V

2.20

2.30

V

Output Undervoltage Protection

Threshold

With respect to unloaded output voltage

65

75

%

Current-Limit Threshold

(Positive, Default)

Current-Limit Threshold

(Positive, Adjustable)

Current-Limit Threshold

(Negative)

GND - LX, ILIM = VCC

GND - LX

LX - GND, ILIM = VCC

ILIM = 0.5V

ILIM = REF (2V)

80

33

160

-140

115 mV

65

mV

240

-80

mV

VCC Undervoltage Lockout

Threshold

Rising edge, hysteresis = 20mV, PWM disabled below this

level

4.1

DH Gate Driver On-Resistance BST - LX forced to 5V

DL Gate Driver On-Resistance

DL, high state (pull up)

DL, low state (pull down)

Logic Input High Voltage

D0–D4, A/B

2.4

Logic Input Low Voltage

D0–D4, A/B

DAC B-Mode Programming

Resistor, Low

D0–D4, 0 to 0.4V or 2.6V to 5.5V applied through resistor,

A/B = GND

4.4

V

3.5

Ω

3.5

Ω

1.0

Ω

V

0.8

V

1

kΩ

DAC B-Mode Programming

Resistor, High

D0–D4, 0 to 0.4V or 2.6V to 5.5V applied through resistor,

A/B = GND

100

kΩ

VGATE Lower Trip Threshold

Measured at FB with respect to unloaded output voltage,

falling edge, hysteresis = 1%

-8.4

-4.6

%

VGATE Upper Trip Threshold

Measured at FB with respect to unloaded output voltage,

rising edge, hysteresis = 1%

+10

+15

%

Note 1: Output voltage accuracy specifications apply to DAC voltages from 0.925V to 2V. Includes load-regulation error.

Note 2: On-Time specifications are measured from 50% to 50% at the DH pin, with LX forced to 0, BST forced to 5V, and a 500pF

capacitor from DH to LX to simulate external MOSFET gate capacitance. Actual in-circuit times may be different due to

MOSFET switching speeds.

Note 3: Specifications to -40°C are guaranteed by design and not production tested.

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