MB90M407 查看數據表（PDF） - Fujitsu

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MB90M407

16-Bit Original Microcontroller

Fujitsu 

MB90M405 Series

■ PRODUCT LINEUP

Part Number

Classification

ROM size

RAM size

Emulator power supply*3

CPU functions

Ports

FL-control circuit

Serial I/O (UART)

16-bit reload timers

16-bit I/O timer

8/10 bit

A/D converter

Time clock

output circuit

I2C*4 Bus

DTP/external

interrupt

Low-power modes

Process

Package

Operating voltage

MB90MF408*1

MB90MF408A*2

MB90M408*1

MB90M408A*2

MB90M407*1

MB90M407A*2

MB90MV405

Internal flash

memory type

Internal mask ROM type

Evaluation

128 Kbytes

96 Kbytes

None onboard

4 Kbytes

4 Kbytes

4 Kbytes

⎯

Included

Number of basic instructions

Minimum instruction execution time

Addressing modes

Program patch function

Maximum memory space

: 351

: 62.5 ns/4 MHz (with x4 multiplier)

: 23

: 2 address pointers

: 16 Mbytes

26 (CMOS) I/O ports (26 ports, also used for resources)

60 FL outputs possible (during LED control, 43 FL output and 17 LED control)

FL and LED driver control enabled

During FL driver control, both digit and segment dimmer setting possible

Includes full-duplex double buffer

Clock-synchronized/asynchronous settings available

Can also be used as clock synchronized extended I/O serial

Also equipped with dedicated baud rate generator

Serial I/O: 2 channels, UART: 2 channels

16-bit reload timer operation (can be set to toggle or one-shot output)

Event count function can be set

3 channels built in

One 16-bit output comparison channel (for clearing freerun timer)

Two 16-bit input capture channels

16 channels (input multiplex)

Choice of 8 and 10-bit resolution available

Conversion time : 6.125 µs (when machine clock operating at 16 MHz)

Possible to divide external input oscillation clock and output externally

Programmable divisions : 32/64/128/256

One I2C interface channel built in

4 independent channels (also used with A/D input)

Interrupt factors : can be set to “L”→“H” edge/“H”→“L” edge/“L” level/“H” level

Sleep mode/timebase timer mode, stop mode, and intermittent CPU mode

CMOS

QFP-100 (0.65 mm pitch)

PGA256

3.3 V ± 0.3 V (16 MHz : 4 MHz 4x)

*1 : All FL-output pins (FIP0 to FIP59) have pull downs

*2 : Some FL-output pins (FIP0 to FIP16) do not have pull downs. The remaining FL-output pins (FIP17 to FIP59)

have pull downs.

*3 : Setting of DIP Switch (S2) when using emulation pod (MB2145-507) . Refer to “2.7 Dedicated Emulator Power

Supply” in the “MB2145-507 Hardware Manual” for details.

*4 : Purchase of Fujitsu I2C components conveys a license under the Philips I2C Patent Rights to use, these

components in an I2C system provided that the system conforms to the I2C Standard Specification as defined

by Philips.

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