MCF5207CAG166(2006) 查看數據表（PDF） - Freescale Semiconductor

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MCF5207CAG166
(Rev.:2006)

ColdFire® Microprocessor

Freescale Semiconductor 

Signal Descriptions

Table 3. MCF5207/8 Signal Information and Muxing (continued)

Signal Name

PSTCLK

BKPT

DSI

DSO

DDATA[3:0]

PST[3:0]

ALLPST

GPIO

—

—

—

—

—

—

—

Alternate 1

TCLK2

TMS2

TDI2

TDO

—

—

—

MCF5207

Alternate 2 Dir.1

144

LQFP

MCF5207

144

MAPBGA

MCF5208

160

QFP

—

O

64

M7

70

—

I

75

L12

83

—

I

77

H9

85

—

O

69

M9

75

—

O

—

K9, L9, M11,

—

M8

—

O

—

L11, L8,

—

K10, K8

—

O

67

—

73

MCF5208

196

MAPBGA

P9

M14

K12

M12

P11, N11,

M11, P10

N10, M10,

L10, L9

—

TEST6

—

PLL_TEST

—

Test

—

—

I

109

—

—

C12

—

—

I

—

—

—

M13

Power Supplies

EVDD

—

—

—

1, 63, 66, 72, E5–E6, F5, 2, 9, 69, 72, E5–E7, F5,

81, 87, 125 G8–G9, 80, 89, 95, F6, G5, H10,

H7–H8

131

J9, J10,

K8–K10,

K13, M9

IVDD

—

—

—

30, 68, 84, D4, D8, H4, 36, 74, 92, J12, D4,

113, 143

H11, J9

121, 159 D11, H11,

L4, L11,

PLL_VDD

—

—

—

86

H12

94

H13

SD_VDD

—

—

—

3, 17, 33, 35, E7–E8, F8, 11, 39, 41, E8–E10, F9,

61, 89, 110, G5, H5–H6, 67, 97, 118, F10, G10,

123

J3

129

H5, J5, J6,

K5–K7, L2

VSS

—

—

—

2, 16, 36, 62, D10, F6–F7, 1, 10, 42, 68, A1, A14,

65, 73, 88, G6–G7 71, 81, 96, F7–F8,

111, 124

117, 119, G6–G9,

130

H6–H9,

J7–J8, L13,

M2, N9, P1,

P14

PLL_VSS

—

—

—

85

—

93

H12

NOTES:

1 Refers to pin’s primary function.

2 Pull-up enabled internally on this signal for this mode.

3 Primary functionality selected by asserting the DRAMSEL signal (SDR mode). Alternate functionality selected by negating

the DRAMSEL signal (DDR mode). The GPIO module is not responsible for assigning these pins.

4 GPIO functionality is determined by the edge port module. The GPIO module is only responsible for assigning the alternate

functions.

MCF5208 ColdFire® Microprocessor Data Sheet, Rev. 0.5

Freescale Semiconductor

Preliminary

7

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