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MN838850 查看數據表(PDF) - Panasonic Corporation

零件编号
产品描述 (功能)
生产厂家
MN838850
Panasonic
Panasonic Corporation Panasonic
MN838850 Datasheet PDF : 26 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Color TFT LCD Driver
MN838850
s Functional Description (continued)
Operation when Connected in Cascade
When RL is high:
Driver A acquires the PLSR start pulse on the rising edge of FY and starts acquiring data on the next FY rising edge.
The PRSL (carry) output will go high 64 clock pulses after the start pulse input and data acquisition will stop one clock
cycle later.
Driver B receives the driver A PRSL rising edge and starts accepting data one clock cycle later.
FY
Acquired on the falling
edge of FY.
State of
signal 1
State of
signal 2
D00 to D07
D10 to D17
D20 to D27
D30 to D37
D40 to D47
D50 to D57
64 clock cycles
Driver B
1 3 5 ··· 125 127 129 131 133
135
2 4 6 ··· 126 128 130 132 134
Data acquired by driver A
246
LCD controller
8-bit RGB data
Start pulse
1
2
PLSR PRSL
PLSR PRSL
Driver A
Driver B
PLSR PRSL
Driver C
9

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