PAL22V10 查看數據表（PDF） - Cypress Semiconductor

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PAL22V10

Reprogrammable CMOS PAL® Device

Cypress Semiconductor 

This is an abbreviated data sheet. Contact a Cypress

representative for complete specifications.

USE ULTRA37000TM FOR

ALL NEW DESIGNS

PALC22V10

Features

• Advanced second-generation PAL® architecture

• Low power

— 55 mA max. “L”

— 90 mA max. standard

— 120 mA max. military

• CMOS EPROM technology for reprogrammability

• Variable product terms

— 2 x (8 through 16) product terms

• User-programmable macrocell

— Output polarity control

— Individually selectable for registered or

combinatorial operation

Logic Block Diagram (PDIP/CDIP)

VSS

I

I

I

I

I

12

11

10

9

8

7

Reprogrammable CMOS

PAL® Device

• 20, 25, 35 ns commercial and industrial

• 25, 30, 40 ns military

• Up to 22 input terms and 10 outputs

• High reliability

— Proven EPROM technology

— 100% programming and functional testing

• Windowed DIP, windowed LCC, DIP, LCC, and PLCC

available

Functional Description

The Cypress PALC22V10 is a CMOS second-generation

programmable logic array device. It is implemented with the

familiar sum-of-products (AND-OR) logic structure and a

new concept, the “programmable macrocell.”

I

I

6

5

I

I

I

CP/I

4

3

2

1

PROGRAMMABLE

AND ARRAY

(132 X 44)

8

10

12

14

16

16

14

12

10

8

Reset

Macrocell

Macrocell

Macrocell

Macrocell

Macrocell

Macrocell

Macrocell

Macrocell

Macrocell

Macrocell

Preset

13

14

15

16

17

I

I/O9

I/O8

I/O 7

I/O6

Pin Configuration

18

19

I/O5

I/O4

LCC/PLCC

Top View

20

21

22

23

24

I/O3

I/O2

I/O1

I/O0

VCC

4 3 2 1 282726

I5

25

I6

24

INC 7

23

8

22

I9

21

I 10

20

I 11

19

12131415161718

I/O 2

I/O 3

I/O 4

NC

I/O 5

I/O 6

I/O 7

Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600

Document #: 38-03052 Rev. *A

Revised April 9, 2004

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