SPHE8281D 查看數據表（PDF） - Unspecified
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SPHE8281D Datasheet PDF : 35 Pages
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Preliminary
SPHE8281D/Dx
Symbol
R_CS3_B/GPIO
R_CS2_B/GPIO
R_CS1_B/GPIO
RST_B
IR_IN/GPIO
VFD_CLK/GPIO
VFD_STB/GPIO
VFD_DATA/GPIO
R_A20
R_A19 (E_MX11)
CLKIN
CLKOUT
RESERVED_N
RESERVED_P
RESERVED
RESERVED
VSS_PLLA
VDD_PLLA
VSS_PLLV
VDD_PLLV
M_DD[7]
M_DD[6]
M_DD[5]
M_DD[4]
Pin No. I/O
67
IO
68
IO
69
IO
70
I
71
IO
72
IO
73
IO
74
IO
75
IO
76
IO
77
I
78
O
79
A
80
A
81
A
82
A
83
S
84
S
85
S
86
S
87
IO
88
IO
89
IO
90
IO
Description
ROM / SRAM / flash chip select #3 or GPIO
Priority selection
sft_cfg1[2]=1’b1
sft_cfg8[9]=1’b1
Function
R_CS3_B (default)
DAC_DATA_E[8]
(other)
GPIO[17]
ROM / SRAM / flash chip select #2 or GPIO
Priority selection
sft_cfg1[1]=1’b1
sft_cfg8[9]=1’b1
Function
R_CS2_B (default)
DAC_DATA_E[7]
(other)
GPIO[18]
ROM / SRAM / flash chip select #1 or GPIO
Priority selection
sft_cfg1[0]=1’b1
sft_cfg8[9]=1’b1
Function
R_CS1_B (default)
DAC_DATA_E[6]
(other)
GPIO[19]
System reset (active low reset)
GPIO
Priority selection
sft_cfg8[0]=1’b1
Function
IR_IN,GPIO[20]
(other)
GPIO[20] (default)
GPIO[21] for VFD_CLK
GPIO[22] for VFD_STB
Priority selection
sft_cfg8[9]=1’b1
Function
DAC_DATA_E[5]
(other)
GPIO[22] (default)
GPIO[23] for VFD_DATA
Priority selection
sft_cfg8[9]=1’b1
Function
DAC_DATA_E[4]
(other)
GPIO[23] (default)
ROM / SRAM / flash address bus bit [20] (216pin package)
ROM / SRAM / flash address bus bit [19]
Clock input / crystal in (XTALI)
Clock output / crystal out (XTALO)
Reserved
Reserved
Reserved
Reserved
Ground pin for audio PLL
3.3V power supply pin for audio PLL
Ground pin for system PLL and audio PLL
1.8V power supply pin for system PLL
SDRAM data bus [7]
SDRAM data bus [6]
SDRAM data bus [5]
SDRAM data bus [4]
© Sunplus Confidential
14
Contents are subject to change without Notice
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MAY. 19, 2005
Preliminary Version: 0.1
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