SST39LF100 查看數據表（PDF） - Silicon Storage Technology
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SST39LF100 Datasheet PDF : 22 Pages
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AC CHARACTERISTICS
1 Mbit Multi-Purpose Flash
SST39LF100 / SST39VF100
Data Sheet
TABLE 9: READ CYCLE TIMING PARAMETERS VDD = 3.0-3.6V FOR SST39LF100 AND 2.7-3.6V FOR SST39VF100
SST39LF100-35
SST39VF100-70
Symbol Parameter
Min
Max
Min
Max
Units
TRC
TCE
TAA
TOE
TCLZ1
TOLZ1
TCHZ1
TOHZ1
TOH1
Read Cycle Time
Chip Enable Access Time
Address Access Time
Output Enable Access Time
CE# Low to Active Output
OE# Low to Active Output
CE# High to High-Z Output
OE# High to High-Z Output
Output Hold from Address Change
45
70
45
70
45
70
20
35
0
0
0
0
15
20
15
20
0
0
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
ns
ns
ns
ns
ns
ns
ns
ns
ns
T9.3 363
TABLE 10: PROGRAM/ERASE CYCLE TIMING PARAMETERS
Symbol Parameter
Min
Max
Units
TBP
Word-Program Time
20
µs
TAS
Address Setup Time
0
ns
TAH
Address Hold Time
30
ns
TCS
WE# and CE# Setup Time
0
ns
TCH
WE# and CE# Hold Time
0
ns
TOES
OE# High Setup Time
0
ns
TOEH
OE# High Hold Time
10
ns
TCP
CE# Pulse Width
40
ns
TWP
TWPH1
TCPH1
WE# Pulse Width
WE# Pulse Width High
CE# Pulse Width High
40
ns
30
ns
30
ns
TDS
TDH1
TIDA1
Data Setup Time
Data Hold Time
Software ID Access and Exit Time
30
ns
0
ns
150
ns
TSE
Sector-Erase
25
ms
TBE
Block-Erase
25
ms
TSCE
Chip-Erase
100
ms
T10.1 363
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
©2001 Silicon Storage Technology, Inc.
8
S71129-02-000 6/01 363
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