ST78C34 查看數據表（PDF） - Exar Corporation

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ST78C34

GENERAL PURPOSE PARALLEL PRINTER PORT WITH 83 BYTE FIFO

Exar Corporation 

ST78C34

written into the FIFO and the counter will not incre-

ment.

Two interrupt modes are available and are selected

with the INTSEL pin. If this pin is tied low, a latched

interrupt will result. In this mode, INT will transition low

when a “1” is written to Control Register bit-0. A reset

or reading the Status Register will clear the interrupt.

If INTSEL pin is tied high, INT will transition low when

a “1” is written to Control Register bit-0 and will

transition high when a write to the parallel port is

issued. This (non-latched) interrupt signal is always

available in Status Register bit-6 regardless of the

state of the INTSEL pin. Status Register bit-2 will

always contain the latched interrupt state. The polarity

of the INT pin may be inverted by setting Alternate

Function Register bit-6 high.

The ST78C34 provides additional programmable in-

terrupt output options by programming the Alternate

Function Register bit 4-5. INT output can be selected

as FIFO full or FIFO empty interrupt.

REGISTER DESCRIPTIONS

PORT REGISTER

Bi-directional printer port.

Writing to this register during output mode will transfer

the contents of the data bus to the PD7-PD0 ports .

Reading this register during input mode will transfer

the states of the PD7-PD0 to the data bus. This

register will be set to the output mode after reset.

PR BIT 7-0:

PD7-PD0 bi-directional I/O ports.

1= no interrupt is pending

Reading the STATUS REGISTER will set this bit to

“1”.

STR BIT-3:

ERROR input state.

0= ERROR input is in low state

1= ERROR input is in high state

STR BIT-4:

SLCT input state.

0= SLCT input is in low state

1= SLCT input is in high state

STR BIT-5:

PE input state.

0= PE input is in low state

1= PE input is in high state

STR BIT-6:

-ACK input state.

0= -ACK input is in low state

1= -ACK input is in high state

STR BIT-7:

BUSY or FIFO full signal.

0= BUSY input is in high state

1= BUSY input is in low state

FIFO is enabled.

0= FIFO is full

1= One or more empty locations in FIFO

COMMAND REGISTER

STATUS REGISTER

This register provides the state of the printer outputs

and the interrupt condition.

The state of the -STROBE, -AUTOFDXT, INIT, -

SLCTIN pins, and interrupt enable bit can be read by

this register regardless of the I/O direction.

STR BIT 1-0:

This bits are set to “1” normally except when AFR bit

5-4 are both set to “1”.

STR BIT-2:

Interrupt condition.

0= an interrupt is pending

This bit will be set to “0” at the falling edge of the -ACK

input.

COM BIT-0:

-STROBE input pin.

0= -STROBE pin is in high state

1= -STROBE pin is in low state

COM BIT-1:

-AUTOFDXT input pin.

0= -AUTOFDXT pin is in high state

1= -AUTOFDXT pin is in low state

Rev. 3.00

6-9

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