UPD16430AGF-3B9 查看數據表（PDF） - NEC => Renesas Technology

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UPD16430AGF-3B9

1/2, 1/3, 1/4 DUTY LCD CONTROLLER/DRIVER

NEC => Renesas Technology 

µPD16430A

(3) Status setting command

MSB

LSB

TTL AL L

EEC DA C

SSD DT D

1 0 T T E RC O

1 0 X RH N

E

S

Turns on all displays.

(no display unless logic high is input to LCDOFF pin)

0 : All displays are turned off at the rising edge of the

STB signal immediately after this command is input.

1 : All displays are turned on at the rising edge of the

STB signal immediately after this command is input.

Sets method for latching to RAM data output bufferNote

0 : Does not latch RAM data to output buffer.

1 : Latches to output buffer at every rising edge of STB signal.

Resets group address.

0 : Does not reset group address.

1 : Resets group address at rising edge of

STB signal following data write (000000B).

Sets drive voltage supply method.

0 : External

1 : Internal

Sets test mode.

00 : Normal operation (master)

01 : Normal operation (slave)

10 : Test mode

11 : Test mode

Values at power-on reset

000 00 0

Remark LATCH MD flag and LATCH flag

The relations between the LATCH MD flag and the LATCH flag are shown below.

Mode LATCH MD LATCH

Operation

1

0

0

Does not latch RAM data to output buffer.

2

0

1

Latches every time to output buffer at rising edge of STB signal.

3

1

0

Latches to output buffer at rising edge of STB signal immediately after data input.

4

1

1

Latches every time to output buffer at rising edge of STB signal.

In modes 2 and 4, since latching to the output buffer is executed at the rising edge of the STB signal when only

a command has been issued from the STB pin, busy status comes at each rising edge of the STB signal.

10

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