UPD16430AGF-3B9 查看數據表（PDF） - NEC => Renesas Technology
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UPD16430AGF-3B9 Datasheet PDF : 24 Pages
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µPD16430A
No. Symbol
78 BUSY
79 LCDOFF
80 VDD
I/O
Output
Input
—
Output Type
Nch
Open drain
—
—
Description
This pin outputs the serial communication status and the internal data
processing status.
When this signal is a logic high, serial communication is executed.
When this signal is a logic low, it indicates that the display RAM data is
latched to the output buffer.
When the power-on reset circuit is operating, this pin holds a logic low until
a rising or falling signal is input to the STB pin.
This pin serves to turn off all the LCD displays.
When a logic low is input to this pin, all LCD displays are turned off.
Display RAM data is maintained.
Since displays are turned off only by the output driver, serial communica-
tions can be executed as usual.
To turn on displays, it is necessary to input a logic high to this pin and
reset the LCDON flag.
This pin is a power supply pin to the device.
A voltage of 3.5 to 6.0 V is supplied to this pin.
When the supply voltage rises from 0 V to 3 V, or when it reaches a value
under 3 V and then rises again, the power-on reset circuit starts operating
and the device is set to its initialized state.
When the device is in its initialized state, all displays are turned off
(segment and common signals are fixed to VLCD).
Do not supply a voltage higher than VDD to the VLCD pin before the supply
voltage reaches 3.5 V as this will cause incorrect display.
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