GS82032AGT-133 查看數據表（PDF） - Giga Semiconductor

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GS82032AGT-133

64K x 32 2Mb Synchronous Burst SRAM 180 MHz–66 MHz 3.3 V VDD 3.3 V and 2.5 V I/O

Giga Semiconductor 

GS82032AT-180/166/150/133/100/66/4/5/6

Undershoot Measurement and Timing

VIH

VSS

50%

VSS – 2.0 V

20% tKC

Overshoot Measurement and Timing

VDD +- 2.0 V

50%

20% tKC

VDD

VIL

Capacitance

(TA = 25°C, f = 1 MHZ, VDD = 3.3 V)

Parameter

Control Input Capacitance

Input Capacitance

Output Capacitance

Note:

This parameter is sample tested.

Symbol

CI

CIN

COUT

Test conditions

VDD = 3.3 V

VIN = 0 V

VOUT = 0 V

AC Test Conditions

Parameter

Conditions

Input high level

2.3 V

Input low level

0.2 V

Input slew rate

1 V/ns

Input reference level

1.25 V

Output reference level

1.25 V

Output load

Fig. 1& 2

Notes:

1. Include scope and jig capacitance.

2. Test conditions as specified with output loading as shown in Fig. 1 unless otherwise noted.

3. Output Load 2 for tLZ, tHZ, tOLZ and tOHZ

4. Device is deselected as defined by the Truth Table.

Typ. Max. Unit

3

4

pF

4

5

pF

6

7

pF

Output Load 1

DQ

Output Load 2

2.5 V

50Ω

30pF*

DQ

225Ω

VT = 1.25 V

* Distributed Test Jig Capacitance

5pF* 225Ω

Rev: 1.12 10/2004

11/22

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

© 2000, GSI Technology

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