MAX19708ETM 查看數據表（PDF） - Maxim Integrated

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MAX19708ETM

10-Bit, 11Msps, Ultra-Low-Power Analog Front-End

Maxim Integrated 

10-Bit, 11Msps, Ultra-Low-Power

Analog Front-End

ELECTRICAL CHARACTERISTICS (continued)

(VDD = 3V, OVDD = 1.8V, internal reference (1.024V), CL ≈ 10pF on all digital outputs, fCLK = 11MHz (50% duty cycle), Rx ADC input

amplitude = -0.5dBFS, Tx DAC output amplitude = 0dBFS, differential Rx ADC input, differential Tx DAC output, CREFP = CREFN =

CCOM = 0.33µF, unless otherwise noted. CL < 5pF on all aux-DAC outputs. Typical values are at TA = +25°C.) (Note 1)

PARAMETER

SYMBOL

CONDITIONS

Tx PATH INTERCHANNEL CHARACTERISTICS

I-to-Q Output Isolation

fOUTX,Y = 500kHz, fOUTX,Y = 620kHz

Gain Mismatch Between DAC

Outputs

Measured at DC

MIN TYP MAX UNITS

90

dB

-0.30 ±0.02 +0.31 dB

Phase Mismatch Between DAC

Outputs

fOUT = 620kHz, fCLK = 11MHz

±0.04

D eg r ees

Differential Output Impedance

Tx PATH ANALOG OUTPUT

Bit E7 = 0 (default)

Full-Scale Output Voltage (Table 8)

VFS

Bit E7 = 1

Bits CM1 = 0, CM0 = 0 (default)

Output Common-Mode Voltage

(Table 11)

VCOM

Bits CM1 = 0, CM0 = 1

Bits CM1 = 1, CM0 = 0

Bits CM1 = 1, CM0 = 1

Rx ADC–Tx DAC INTERCHANNEL CHARACTERISTICS

800

Ω

±410

mV

±500

1.27

1.4

1.48

1.25

V

1.1

0.9

Receive Transmit Isolation

ADC fINI = fINQ = 1.875MHz, DAC fOUTI =

90

dB

fOUTQ = 620kHz, fCLK = 11MHz

AUXILIARY ADC (ADC1, ADC2)

Resolution

N

10

Bits

Full-Scale Reference

VREF

AD1 = 0 (default)

AD1 = 1

2.048

V

VDD

Analog Input Range

0 to

V

VREF

Analog Input Impedance

At DC

500

kΩ

Input-Leakage Current

Gain Error

Zero-Code Error

Differential Nonlinearity

Integral Nonlinearity

Supply Current

GE

ZE

DNL

INL

Measured at unselected input from 0 to

VREF

Includes reference error

±0.1

-5

+5

2

±0.53

±0.45

210

µA

%FS

mV

LSB

LSB

µA

6 _______________________________________________________________________________________

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