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BC57E687CGITBE4 查看數據表(PDF) - Unspecified

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BC57E687CGITBE4 Datasheet PDF : 104 Pages
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Device Details
1 Device Details
Radio
Kalimba DSP
Common TX/RX terminal simplifies external
Very low power Kalimba DSP coprocessor,
matching; eliminates external antenna switch
64MIPS, 24-bit fixed point core
BIST minimises production test time
SBC decode takes approximately 4mW power
Bluetooth v2.1 + EDR specification compliant
consumption while streaming music
Transmitter
Single-cycle MAC; 24 x 24-bit multiply and 56-bit
accumulator
8dBm RF transmit power with level control from on- 32-bit instruction word, dual 24-bit data memory
chip 6-bit DAC over a dynamic range >30dB
6K x 32-bit program RAM, 16K x 24-bit + 12K x 24-
Class 2 and Class 3 support without the need for an
bit data RAM
external power amplifier or TX/RX switch
64-word x 32-bit program memory cache when
executing from external flash
Receiver
Stereo Audio Codec
Receiver sensitivity of -90dBm
Integrated channel filters
16-bit internal stereo codec
Digital demodulator for improved sensitivity and co- Dual ADC and DAC for stereo audio
channel rejection
Integrated amplifiers for driving 16Ω speakers; no
Real-time digitised RSSI available on HCI interface
need for external components
Fast AGC for enhanced dynamic range
Support for single-ended speaker termination and
line output
Synthesiser
Integrated low-noise microphone bias
Fully integrated synthesiser requires no external
VCO, varactor diode, resonator or loop filter
Compatible with crystals 16MHz to 26MHz or an
external clock 12MHz to 52MHz
ADC sample rates are 8, 11.025, 16, 22.05, 32 and
44.1kHz
DAC sample rates are 8, 11.025, 12, 16, 22.05, 24,
32, 44.1 and 48kHz
Accepts 14.40, 15.36, 16.2, 16.8, 19.2, 19.44,
19.68, 19.8 and 38.4MHz TCXO frequencies for
GSM and CDMA devices with sinusoidal or logic
level signals
Auxiliary Features
User space on processor for customer applications
Crystal oscillator with built-in digital trimming
Baseband and Software
Power management includes digital shutdown and
wake-up commands with an integrated low-power
32Mb external flash
oscillator for ultra-low power Park/Sniff/Hold mode
48KB internal RAM, allows full-speed data transfer, Clock request output to control external clock
mixed voice/data and full piconet support
On-chip regulators: 1.5V output from 1.8V to 2.7V
Logic for forward error correction, header error
control, access code correlation, CRC,
demodulation, encryption bit stream generation,
input and 1.8V output from 2.7V to 4.5V input
On-chip high-efficiency switch-mode regulator;
1.8V output from 2.7V to 4.4V input
whitening and transmit pulse shaping
Power-on-reset cell detects low supply voltage
Transcoders for A-law, µ-law and linear voice from 10-bit ADC and 8-bit DAC available to applications
host and A-law, µ-law and CVSD voice over air
On-chip charger for lithium ion/polymer batteries
Physical Interfaces
Bluetooth Stack
SPI with clock speeds up to 64MHz in master mode, CSR's Bluetooth Protocol Stack runs on the on-chip
requires firmware support, and 32MHz in slave
MCU in a variety of configurations:
mode
Standard HCI, UART or USB
I²C master compatible interface
Audio codec and echo-noise suppression or
UART interface with programmable data rate up to
customer-specific algorithms running on the DSP
3Mbits/s with an optional bypass mode
USB v2.0 interface
Package Option
Bidirectional serial programmable audio interface TFBGA 169-ball, 8 x 8 x 1.2mm, 0.5mm pitch
supporting PCM, I²S and SPDIF formats
2 LED drivers with faders
CS-121064-DSP4
Production Information
This material is subject to CSR's non-disclosure agreement
© Cambridge Silicon Radio Limited 2006 - 2010
Page 10 of 104

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