320724-01 查看數據表（PDF） - National Instruments Corporation
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320724-01 Datasheet PDF : 16 Pages
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TNT4882
Single-Chip IEEE 488.2 Talker/Listener ASIC
TNT4882 Register Map
ADDR4-0
00000
00010
00100
“
“
“
00110
01000
“
“
“
01010
01100
01110
10001
10011
10101
10111
11011
11101
11111
ADDR4-0
01001
01011
01101
10000
10010
10100
10110
11000
11001
11010
11100
11110
ADDR4-0
00101
00111
Hex Offset
0
2
4
“
“
“
6
8
“
“
“
A
C
E
11
13
15
17
1B
1D
1F
Hex Offset
9
B
D
10
12
14
16
18
19
1A
1C
1E
Hex Offset
5
7
NAT4882 Registers
7210 Mode
9914 Mode
9914 Mode Swapped
Read Register
Write Register
Read Register
Write Register
Read Register
Write Register
DIR
CDOR
ISR0
IMR0
DIR
CDOR
ISR1
IMR1
ISR1
IMR1
CPTR
PPR
ISR2
IMR2
ADSR
IMR2
SPSR
SPMR
EOSR
BCR
ACCR
SPSR
SPMR
BSR
AUXCR
ISR2
ADR
ADSR
ADMR
ISR2
ADR
ADSR
IMR2
EOSR
BCR
ACCR
CPTR
AUXMR
SPSR
SPMR
BSR
AUXCR
ADR0
ADR
CPTR
PPR
ISR0
IMR0
ADR1
EOSR
DIR
CDOR
ISR1
IMR1
DSR
SH_CNT
–
–
–
–
–
HIER
–
–
–
–
–
MISC
–
–
–
–
CSR
KEYREG
–
–
–
–
SASR
DCR
–
–
–
–
ISR0
IMR0
–
–
–
–
BSR
BCR
–
–
–
–
Turbo488 Registers (Same in All Modes)
Read Register
Write Register
CNT2
CNT2
CNT3
CNT3
–
HSSEL
STS1
CFG
IMR3
IMR3
CNT0
CNT0
CNT1
CNT1
FIFOB
FIFOB
FIFOA
FIFOA
ISR3
CCR
STS2
CMDR
TIMER
TIMER
Special Registers Only Accessible in ISA Pin Configuration
Read Register
Write Register
–
ACCWR
–
INTR
Notes on Register Map
1. For complete register descriptions, see the “TNT4882
Programmer Reference Manual” (320724-01)
2. Some of the 7210 mode registers, such as the ISR1, have
the same names as some of the 9914 mode registers. The
7210 mode registers are NOT the same as their 9914 mode
counterparts. Be sure to refer to the appropriate bit map for
the chip emulation mode you are using when programming
these registers.
3. The shaded registers are “paged-in registers.” Paged-in
registers only exist in 9914 mode. Writing to the address of the
9914 mode ADSR normally does not access any registers.
Writing one of four page-in commands to the AUXCR changes
all subsequent writes to that address to that of the
corresponding paged-in register. The two readable paged-in
registers, the 9914 mode SPSR and ISR2, are both paged in
whenever any one of the four writable paged-in registers is
paged in. When you write the clear page-in command to the
AUXCR, all paged-in registers are paged out again and are no
longer accessible.
4. There are several unused bytes in the address space of the
TNT4882. These addresses are reserved for adding new
features to the chip. You should not map any external
hardware into these addresses or access them at any time, as
this may cause compatibility problems with future versions of
the TNT4882.
6 National Instruments
Phone: (512) 794-0100 • Fax: (512) 683-9300 • info@natinst.com • www.natinst.com
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