PCT2075TP 查看數據表（PDF） - NXP Semiconductors.

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PCT2075TP

I2C-bus Fm+, 1 degree C accuracy, digital temperature sensor and thermal watchdog

NXP Semiconductors. 

NXP Semiconductors

PCT2075

I2C-bus Fm+ digital temperature sensor and thermal watchdog

7. Functional description

7.1 General operation

The PCT2075 uses the on-chip band gap sensor to measure the device temperature with

the resolution of 0.125 C and stores the 11-bit two’s complement digital data, resulted

from 11-bit A-to-D conversion, into the device Temp register. This Temp register can be

read at any time by a controller on the I2C-bus. Reading temperature data does not affect

the conversion in progress during the read operation.

The PCT2075 can be set to operate in either mode: normal or shutdown. In normal

operation mode, the temp-to-digital conversion is executed every 100 ms or other

programmed value and the Temp register is updated at the end of each conversion.

During each ‘conversion period’ (Tconv) of about 100 ms, the device takes only about

28 ms, called ‘temperature conversion time’ (tconv(T)), to complete a temperature-to-data

conversion and then becomes idle for the time remaining in the period. This feature is

implemented to significantly reduce the device power dissipation.

In shutdown mode, the device becomes idle, data conversion is disabled and the Temp

register holds the latest result; however, the device I2C-bus interface is still active and

register write/read operation can be performed. The device operation mode is controllable

by programming bit B0 of the configuration register. The temperature conversion is

initiated when the device is powered-up or put back into normal mode from shutdown.

In addition, at the end of each conversion in normal mode, the temperature data (or Temp)

in the Temp register is automatically compared with the overtemperature shutdown

threshold data (or Tots) stored in the Tos register, and the hysteresis data (or Thys) stored

in the Thyst register, in order to set the state of the device OS output accordingly. The

device Tos and Thyst registers are write/read capable, and both operate with 9-bit

two’s complement digital data. To match with this 9-bit operation, the Temp register uses

only the 9 MSB bits of its 11-bit data for the comparison. Tots must always be higher than

Thys.

The way that the OS output responds to the comparison operation depends upon the OS

operation mode selected by configuration bit B1, and the user-defined fault queue defined

by configuration bits B3 and B4.

In OS comparator mode, the OS output behaves like a thermostat. It becomes active

when the Temp exceeds the Tots, and is reset when the Temp drops below the Thys.

Reading the device registers or putting the device into shutdown does not change the

state of the OS output. The OS output in this case can be used to control cooling fans or

thermal switches.

In OS interrupt mode, the OS output is used for thermal interruption. When the device is

powered-up, the OS output is first activated only when the Temp exceeds the Tots, then it

remains active indefinitely until being reset by a read of any register. Once the OS output

has been activated by crossing Tots and then reset, it can be activated again only when

the Temp drops below the Thys; then again, it remains active indefinitely until being reset

by a read of any register. The OS interrupt operation would be continued in this sequence:

Tots trip, Reset, Thys trip, Reset, Tots trip, Reset, Thys trip, Reset, etc. Putting the device

into the shutdown mode by setting the bit 0 of the configuration register also resets the OS

output.

PCT2075

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 7 — 6 March 2014

© NXP Semiconductors N.V. 2014. All rights reserved.

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