ALC5616 查看數據表（PDF） - Realtek Semiconductor

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ALC5616

Ultra-Low Power Audio CODEC for Mobile Devices

Realtek Semiconductor 

ALC5616

Datasheet

List of Figures

FIGURE 1. BLOCK DIAGRAM .......................................................................................................................................................3

FIGURE 2. AUDIO MIXER PATH ...................................................................................................................................................4

FIGURE 3. DIGITAL MIXER PATH ................................................................................................................................................5

FIGURE 4. PIN ASSIGNMENTS ......................................................................................................................................................6

FIGURE 5. AUDIO CLOCK TREE .................................................................................................................................................13

FIGURE 6. PCM MONO DATA MODE A FORMAT (BCLK POLARITY=0) ..............................................................................16

FIGURE 7. PCM MONO DATA MODE A FORMAT (BCLK POLARITY=1) ..............................................................................16

FIGURE 8. PCM MONO DATA MODE B FORMAT (BCLK POLARITY=0) ..............................................................................17

FIGURE 9. PCM STEREO DATA MODE A FORMAT (BCLK POLARITY=0)..............................................................................17

FIGURE 10. PCM STEREO DATA MODE B FORMAT (BCLK POLARITY=0)..............................................................................17

FIGURE 11. I2S DATA FORMAT (BCLK POLARITY=0).............................................................................................................18

FIGURE 12. LEFT-JUSTIFIED DATA FORMAT (BCLK POLARITY=0) ........................................................................................18

FIGURE 13. 2-CHANNEL RECORDING PATH ................................................................................................................................19

FIGURE 14. 4-CHANNEL PLAYBACK PATH ..................................................................................................................................20

FIGURE 15. DAC DRC FUNCTION BLOCK ..................................................................................................................................25

FIGURE 16. ADC AGC FUNCTION BLOCK..................................................................................................................................25

FIGURE 17. DRC/AGC FOR PLAYBACK/RECORDING MODE .......................................................................................................26

FIGURE 18. DRC/AGC FOR NOISE GATE MODE.........................................................................................................................27

FIGURE 19. DATA TRANSFER OVER I2C CONTROL INTERFACE ...................................................................................................31

FIGURE 20. GPIO FUNCTION BLOCK ..........................................................................................................................................33

FIGURE 21. IRQ FUNCTION BLOCK.............................................................................................................................................33

FIGURE 22. JD SOURCE SELECTION ............................................................................................................................................34

FIGURE 23. POWER MANAGEMENT.............................................................................................................................................36

FIGURE 24. I2C CONTROL INTERFACE.........................................................................................................................................89

FIGURE 25. TIMING OF I2S/PCM MASTER MODE........................................................................................................................90

FIGURE 26. I2S/PCM SLAVE MODE TIMING ...............................................................................................................................91

FIGURE 27. APPLICATION CIRCUIT .............................................................................................................................................93

FIGURE 28. PACKAGE DIMENSION ..............................................................................................................................................94

I2S Audio CODEC for Mobile Devices

ix

Rev. 0.1

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