MAX6322HPUK35DY-T 查看數據表（PDF） - Maxim Integrated

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MAX6322HPUK35DY-T

5-Pin µP Supervisory Circuits with Watchdog and Manual Reset

Maxim Integrated 

5-Pin µP Supervisory Circuits with

Watchdog and Manual Reset

______________________________________________________________Pin Description

MAX6316L

MAX6316M

MAX6320P

1

—

2

3

4

5

PIN

MAX6317H

MAX6318LH

MAX6318MH

MAX6321HP

MAX6319LH

MAX6319MH

MAX6322HP

—

1

1

1

3

3

2

2

2

3

—

4

4

4

—

5

5

5

NAME

RESET

RESET

GND

MR

WDI

VCC

FUNCTION

MAX6316L/MAX6318LH/MAX6319LH:

Active-Low, Reset Output. CMOS push/pull

output (sources and sinks current).

MAX6316M/MAX6318MH/MAX6319MH:

Bidirectional, Active-Low, Reset Output.

Intended to interface directly to microprocessors

with bidirectional resets such as the Motorola

68HC11.

MAX6320P/MAX6321HP/MAX6322HP:

Open-Drain, Active-Low, Reset Output. NMOS out-

put (sinks current only). Connect a pull-up resistor

from RESET to any supply voltage up to 6V.

Active-High, Reset Output. CMOS push/pull output

(sources and sinks current). Inverse of RESET.

Ground

Active-Low, Manual Reset Input. Pull low to force a

reset. Reset remains asserted for the duration of

the Reset Timeout Period after MR transitions from

low to high. Leave unconnected or connected to

VCC if not used.

Watchdog Input. Triggers a reset if it remains

either high or low for the duration of the watchdog

timeout period. The internal watchdog timer clears

whenever a reset asserts or whenever WDI sees a

rising or falling edge. To disable the watchdog fea-

ture, leave WDI unconnected or three-state the dri-

ver connected to WDI.

Supply Voltage. Reset is asserted when VCC

drops below the Reset Threshold Voltage (VRST).

Reset remains asserted until VCC rises above

VRST and for the duration of the Reset Timeout

Period (tRP) once VCC rises above VRST.

_______________________________________________________________________________________ 5

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