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AD7278(RevC) 查看數據表(PDF) - Analog Devices

零件编号
产品描述 (功能)
生产厂家
AD7278
(Rev.:RevC)
ADI
Analog Devices ADI
AD7278 Datasheet PDF : 28 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD7276/AD7277/AD7278
AD7277 SPECIFICATIONS
VDD = 2.35 V to 3.6 V, fSCLK = 48 MHz, fSAMPLE = 3 MSPS, TA = TMIN to TMAX, unless otherwise noted.
Table 3.
Parameter
DYNAMIC PERFORMANCE
Signal-to-Noise + Distortion (SINAD)3
Total Harmonic Distortion (THD)3
Peak Harmonic or Spurious Noise (SFDR)3
Intermodulation Distortion (IMD)3
Second-Order Terms
Third-Order Terms
Aperture Delay
Aperture Jitter
Full Power Bandwidth
DC ACCURACY
Resolution
Integral Nonlinearity3
Differential Nonlinearity3
Offset Error3
Gain Error3
Total Unadjusted Error (TUE)3
ANALOG INPUT
Input Voltage Ranges
DC Leakage Current
Input Capacitance
LOGIC INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance, CIN4
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Floating-State Leakage Current
Floating-State Output Capacitance4
Output Coding
CONVERSION RATE
Conversion Time
Track-and-Hold Acquisition Time3
Throughput Rate
A Grade 1, 2 B Grade1, 2 Unit
60.5
60.5
dB min
−70
−1
dB max
−76
−76
dB typ
−80
−80
dB typ
Test Conditions/Comments
fIN = 1 MHz sine wave
−82
−82
dB typ
fa = 1 MHz, fb = 0.97 MHz
−82
−82
dB typ
fa = 1 MHz, fb = 0.97 MHz
5
5
ns typ
18
18
ps typ
74
74
MHz typ
@ 3 dB
10
10
MHz typ
@ 0.1 dB
10
10
Bits
±0.5
±0.5
LSB max
±0.5
±0.5
LSB max
Guaranteed no missed codes to 10 bits
±1.5
±1
LSB max
±2
±1.5
LSB max
±2.5
±2.5
LSB max
0 to VDD
±1
±5.5
42
10
0 to VDD
±1
±5.5
42
10
V
μA max
μA max
pF typ
pF typ
−40°C to +85°C
85°C to 125°C
When in track
When in hold
1.7
1.7
V min
2.35 V ≤ VDD ≤ 2.7 V
2
2
V min
2.7 V < VDD ≤ 3.6 V
0.7
0.7
V max
2.35 V ≤ VDD ≤ 2.7 V
0.8
0.8
V max
2.7 V < VDD ≤ 3.6 V
±1
±1
μA max
Typically 10 nA, VIN = 0 V or VDD
2
2
pF typ
VDD − 0.2
VDD − 0.2
V min
0.2
0.2
V max
±2.5
±2.5
μA max
4.5
4.5
pF typ
Straight (natural) binary
ISOURCE = 200 μA, VDD = 2.35 V to 3.6 V
ISINK = 200 μA
250
250
ns max
12 SCLK cycles with SCLK at 48 MHz
60
60
ns min
3.45
3.45
MSPS max SCLK at 48 MHz
Rev. C | Page 5 of 28

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