100355 查看數據表（PDF） - Fairchild Semiconductor

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产品描述 (功能)

生产厂家

100355

Low Power Quad Multiplexer/Latch

Fairchild Semiconductor 

Absolute Maximum Ratings(Note 2)

Storage Temperature (TSTG)

Maximum Junction Temperature (TJ)

VEE Pin Potential to Ground Pin

Input Voltage (DC)

Output Current (DC Output HIGH)

ESD (Note 3)

−65°C to +150°C

+150°C

−7.0V to +0.5V

VEE to +0.5V

−50 mA

≥2000V

Recommended Operating

Conditions

Case Temperature (TC)

Commercial

0°C to +85°C

Industrial

−40°C to +85°C

Supply Voltage (VEE)

−5.7V to −4.2V

Note 2: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum rating.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

Note 3: ESD testing conforms to MIL-STD-883, Method 3015.

Commercial Version

DC Electrical Characteristics (Note 4)

VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = 0°C to +85°C

Symbol

Parameter

Min

Typ

Max

Units

Conditions

VOH

VOL

VOHC

VOLC

VIH

Output HIGH Voltage

Output LOW Voltage

Output HIGH Voltage

Output LOW Voltage

Input HIGH Voltage

−1025

−1830

−1035

−1165

−955

−1705

−870

−1620

−1610

−870

mV

VIN = VIH (Max)

Loading with

mV

or VIL (Min)

50Ω to −2.0V

mV

VIN = VIH (Min)

Loading with

mV or VIL (Max)

50Ω to −2.0V

mV Guaranteed HIGH Signal

for ALL Inputs

VIL

Input LOW Voltage

−1830

−1475

mV Guaranteed LOW Signal

for ALL Inputs

IIL

Input LOW Current

IIH

Input HIGH Current

S0, S1

E1, E2

Dna–Dnd

MR

0.50

µA

VIN = VIL (Min)

220

350

µA

VIN = VIH (Max)

340

430

IEE

Power Supply Current

−87

−40

mA Inputs Open

Note 4: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional

noise immunity and guard banding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho-

sen to guarantee operation under “worst case” conditions.

3

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