28F016XD-85 查看數據表（PDF） - Intel
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28F016XD-85 Datasheet PDF : 54 Pages
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1.0 INTRODUCTION
The documentation of the Intel 28F016XD flash
memory device includes this datasheet, a detailed
user’s manual, and a number of application notes
and design tools, all of which are referenced in
Appendix B.
The datasheet is intended to give an overview of
the chip feature-set and of the operating AC/DC
specifications. The 16-Mbit Flash Product Family
User’s Manual provides complete descriptions of
the user modes, system interface examples and
detailed descriptions of all principles of operation.
It also contains the full list of software algorithm
flowcharts, and a brief section on compatibility
with the Intel 28F008SA.
Significant 28F016XD feature revisions occurred
between datasheet revisions 290533-001 and
290533-002. These revisions center around
removal of the following features:
• All page buffer operations (read, write,
programming, Upload Device Information)
• Command queuing
• Software Sleep and Abort
• Erase all Unlocked Blocks
• Device Configuration command
In addition, a significant 28F016XD change
occurred between datasheet revisions 290532-002
and 290532-003. This change centers around the
addition of a 3/5# pin to the device’s pinout
configuration. Figure 2 shows the 3/5# pin
assignment for the TSOP Type 1 package.
Intel recommends that all customers obtain the
latest revisions of 28F016XD documentation.
1.1 Product Overview
The 28F016XD is a high-performance, 16-Mbit
(16,777,216-bit) block erasable, nonvolatile
random access memory, organized as
1 Mword x 16. The 28F016XD includes thirty-two
32-KW (32,768 word) blocks. A chip memory map
is shown in Figure 3.
The implementation of a new architecture, with
many enhanced features, will improve the device
operating characteristics and result in greater
product reliability and ease-of-use as compared to
28F016XD FLASH MEMORY
other flash memories. Significant features of the
28F016XD include:
• No-Glue Interface to Memory Controllers
• Improved Word Program Performance
• SmartVoltage Technology
Selectable 3.3V or 5.0V VCC
Selectable 5.0V or 12.0V VPP
• Block Program/Erase Protection
The 28F016XD's multiplexed address bus with
RAS# and CAS# inputs allows for a “No Glue”
interface to many existing in-system memory
controllers. As such, 28F016XD-based SIMMs
(72-pin JEDEC Standard) offer attractive
advantages over their DRAM counterparts in many
applications. For more information on 28F016XD-
based SIMM designs, see the application note
referenced at the end of this datasheet.
The 28F016XD incorporates SmartVoltage
technology, providing VCC operation at both 3.3V
and 5.0V and program and erase capability at VPP
= 12.0V or 5.0V. Operating at VCC = 3.3V, the
28F016XD consumes less than 60% of the power
consumption at 5.0V VCC, while 5.0V VCC provides
the highest read performance capability. VPP =
5.0V operation eliminates the need for a separate
12.0V converter, while VPP = 12.0V maximizes
program/erase performance. In addition to the
flexible program and erase voltages, the dedicated
VPP gives complete code protection with VPP ≤
VPPLK.
A 3/5# input pin configures the device’s internal
circuitry for optimal 3.3V or 5.0V read/program
operation.
A Command User Interface (CUI) serves as the
system interface between the microprocessor or
microcontroller and the internal memory operation.
Internal Algorithm Automation allows word
programs and block erase operations to be
executed using a Two-Write command sequence
to the CUI in the same way as the 28F008SA 8-
Mbit FlashFile™ memory.
Software Locking of Memory Blocks is an added
feature of the 28F016XD as compared to the
28F008SA. The 28F016XD provides selectable
block locking to protect code or data such as
direct-executable operating systems or application
code. Each block has an associated nonvolatile
lock-bit which determines the lock status of the
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