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AS6UA5128-BI(2000) 查看數據表(PDF) - Alliance Semiconductor

零件编号
产品描述 (功能)
生产厂家
AS6UA5128-BI
(Rev.:2000)
Alliance
Alliance Semiconductor Alliance
AS6UA5128-BI Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
AS6UA5128
®
Functional description
The AS6UA5128 is a low-power CMOS 4,194,304-bit Static Random Access Memory (SRAM) device organized as
524,288 words × 8 bits. It is designed for memory applications where slow data access, low power, and simple interfacing
are desired.
Equal address access and cycle times (tAA, tRC, tWC) of 55/70ns are ideal for low-power applications. Active high and low
chip selects (CS) permit easy memory expansion with multiple-bank memory systems.
When CS is high, the device enters standby mode: the AS6UA5128 is guaranteed not to exceed 72 µW power consumption
at 3.6V and 55 ns; 41 µW at 2.7V and 70 ns; or 28 µW at 2.3V and 100 ns. The device also returns data when VCC is
reduced to 1.5V for even lower power consumption.
A write cycle is accomplished by asserting write enable ( WE) and chip select (CS) low. Data on the input pins I/O1–I/O8 is
written on the rising edge of WE (write cycle 1) or CS (write cycle 2).To avoid bus contention, external devices should drive
I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE).
A read cycle is accomplished by asserting output enable (OE), chip select (CS), with write enable (WE) High. The chip
drives I/O pins with the data word referenced by the input address. When either chip select or output enable is inactive, or
write enable is active, output drivers stay in high-impedance mode.
All chip inputs and outputs are CMOS-compatible, and operation is from a single 2.3V to 3.6V supply. The device is
available in the JEDEC standard 36(48)-ball FBGA package.
Absolute maximum ratings
Parameter
Device
Symbol
Min
Max
Unit
Voltage on VCC relative to VSS
Voltage on any I/O pin relative to GND
Power dissipation
Storage temperature (plastic)
Temperature with VCC applied
DC output current (low)
VtIN
VtI/O
PD
Tstg
Tbias
IOUT
–0.5
VCC + 0.5
V
–0.5
V
1.0
W
–65
+150
°C
–55
+125
°C
20
mA
Note: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and func-
tional operation of the device at these or any other conditions outside those indicated in the operational sections of this spec ification is not implied. Expo-
sure to absolute maximum rating conditions for extended periods may affect reliability.
Truth table
CS
WE
H
X
L
X
L
H
L
H
L
L
Key: X = Don’t care, L = Low, H = High.
OE
Supply Current I/O1–I/O8
X
X
ISB
High Z
H
ICC
High Z
L
ICC
DOUT
X
ICC
DIN
Mode
Standby (ISB)
Output disable (ICC)
Read (ICC)
Write (ICC)
2
ALLIANCE SEMICONDUCTOR
10/6/00

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