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VSC8162 查看數據表(PDF) - Vitesse Semiconductor

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VSC8162 Datasheet PDF : 20 Pages
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VITESSE
SEMICONDUCTOR CORPORATION
2.488 Gbit/sec SONET/SDH
1:16 Demux with Clock Recovery
Advance Product Information
VSC8162
AC Characteristics (Over recommended operating conditions)
Table 2: High Speed Clock and Data Outputs Timing Characteristics
Parameters
Description
Min Typ Max Units
tpd
Center of output data eye from
falling edge of CLKO+
-75
+75
ps
tDH
CLKO period
tr,tf
RTDO± rise and fall times
tr,tf
CLKO± rise and fall times
— 401.9 —
ps
150
ps.
135
ps
Conditions
20% to 80% into 50load.
20% to 80% into 50load.
Figure 10: VSC8162 High Speed Output Interface
tDH
CLKO+
High Speed Clock Output
RTDO+/–
Retimed Data Output
tpd
tDH
Table 3: D[0-15]+/-, PARITY+/-, CLK16+/- Output Specifications
Parameters
Description
MIN Typ MAX Unit
Conditions
VDIFF
tr,tf
tCQ
tDC
tD
Output level
Output Rise/Fall Times
Clock-to-Data
CLK16 duty cycle
CLK16 period
600
— 1100 mV —
1200
ps 20% to 80% into 50load
-0.2
1.8
ns —
45
55
%—
6.4
ns —
Figure 11: VSC8162 Parallel Interface
DI+/-
High speed differential serial data input
tD
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
Serialized Data
CLK16+
Parallel data clock output
D(0...15),PARITY
Parallel data outputs
tCQ
VALID DATA (1)
tD
VALID DATA (2)
Page 10
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52209-0, Rev. 2.0
9/14/98

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