HFA3683A 查看數據表（PDF） - Intersil
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HFA3683A Datasheet PDF : 17 Pages
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HFA3683A
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.6V
Voltage on Any Other Pin. . . . . . . . . . . . . . . . . . . -0.3 to VCC +0.3V
VCC to VCC Decouple . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +0.3V
Any GND to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +0.3V
Pins 4, 19, 52, 56, 57 and 59 . . . . . . . . . . . . . . . . . . . . . 0.3 to +0.6V
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 to 85oC
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 3.3V
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
TQFP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
65
Maximum Junction Temperature (Plastic Package) . . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
(TQFP - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
General Electrical Specifications
PARAMETER
TEMP.
(oC)
MIN
TYP
MAX
UNITS
Supply Voltage
Full
2.7
-
3.3
V
Receive Total Supply Current (LNA in High Gain)
25
-
33
38
mA
Receive Total Supply Current (LNA in Low Gain)
25
-
27
32
mA
Transmit Total Supply Current
25
-
40
45
mA
Standby Total Supply Current (PLL and LO Buffers Active)
25
-
6
8
mA
TX/RX Power Down Supply Current
TX/RX/Power Down Time (Note 2)
RX/TX, TX/RX Switching Time (Note 2)
Full
-
Full
-
Full
-
10
100
µA
1
10
µs
0.2
1
µs
CMOS Low Level Input Voltage (CLK, DATA, LE) (Note 3)
CMOS High Level Input Voltage (CLK, DATA, LE) (Note 3)
CMOS High or Low Level Input Current (CLK, DATA, LE)
Full
-
-
0.3VDD
V
Full
0.7VDD
-
3.6
V
Full
-3.0
-
+3.0
µA
Control Logic Low Level Input Voltage (H/L, PE1, PE2) (Note 4)
Full
-0.3
-
0.5
V
Control Logic High Level Input Voltage (H/L, PE1, PE2) (Notes 3 and 4)
Full
VDD-0.5
-
-
V
NOTES:
2. TX/RX/TX switching time and power Down/Up time are dependent on external components.
3. VDD is the supply voltage of external Control sources.
4. These three pins H/L, PE1 and PE2 are not connected to CMOS circuitry and have different thresholds from all other control pins.
Cascaded LNA/Mixer AC Electrical Specifications Assumes a direct connection between the LNA and Mixer, IF = 374MHz,
LO = 2075MHz at -6dBm, VCC = 2.7 Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
TEMP.
(oC)
MIN
TYP
MAX
UNITS
RF Frequency Range
Full
2400
-
2500
MHz
IF Frequency Range
Full
280
374
600
MHz
LO Frequency Range
Full
1800
-
2220
MHz
LO Input Drive Level
Single End or Differential
Full
-10
-6
0
dBm
Power/Voltage Gain
High Gain Mode
Full
21.5
25
29
dB
Noise Figure SSB
Full
-
3.7
5.0
dB
Input IP3
Full
-17.5
-11
-
dBm
Input P1dB
Full
-27.5
-22
-
dBm
2-4
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