TZA3019CVH 查看數據表（PDF） - Philips Electronics

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TZA3019CVH

2.5 Gbits/s dual postamplifier with level detectors and 2 × 2 switch

Philips Electronics 

Philips Semiconductors

2.5 Gbits/s dual postamplifier with level

detectors and 2 × 2 switch

Product specification

TZA3019

FUNCTIONAL DESCRIPTION

The TZA3019 is a dual postamplifier with multiplexer and

loss of signal detection (see Figs 1, 2 and 3). The RF path

starts with the multiplexer, which connects an amplifier to

one of the two inputs. It is possible to invert the output for

easy layout of the Printed-Circuit Board (PCB). The signal

is amplified to a certain level. To guarantee this level with

minimum distortion over the temperature range and level

range, an active control part is added. The offset

compensation circuit following the inverter minimizes the

offset.

The Received Signal Strength Indicator (RSSI) or the Loss

Of Signal (LOS) detector uses a 7-stage ‘successive

detection’ circuit. It provides a logarithmic output. The LOS

detector is followed by a comparator with a programmable

threshold. The input signal level-detection is implemented

to check if the input signal voltage is above the user

programmed level. This can insure that data will only be

transmitted when the input signal-to-noise ratio is sufficient

for low bit error rate system operation. A second

offset compensation circuit minimizes the offset of the

logarithmic amplifier.

RF input circuit

The input circuit contains internal 50 Ω resistors

decoupled to VCC via an internal common mode 12 pF

capacitor (see Fig.6).

The input pins are DC-biased at approximately

VCC − 0.33 V by an internal reference generator. The

TZA3019 can be DC-coupled, but AC-coupling is

preferred. In case of DC-coupling, the driving source must

operate within the allowable input range

(VCC − 1.0 V to VCC + 0.3 V). A DC-offset voltage of more

than a few millivolts should be avoided, since the internal

DC-offset compensation circuit has a limited correction

range. When AC-coupling is used, if no DC-compatibility is

required, the values of the coupling capacitors must be

large enough to pass the lowest input frequency of

interest. Capacitor tolerance and resistor variation must be

included for an accurate calculation. Do not use signal

frequencies around the low cut-off circuit frequencies

(f−3dB(l) = 50 kHz for the postamplifiers and f−3dB(l) = 1 MHz

for the LOS circuits).

RF output circuit

Matching the main amplifier outputs (see Fig.7) is not

mandatory. In most applications, the transmission line

receiving end will be properly matched, while very little

reflections occur.

Matching the transmitting end to absorb reflections is only

recommended for very sensitive applications.

In such cases, pull-up resistors of 100 Ω should be

connected as close as possible to the IC from pins OUT1

and OUT1Q, and pins OUT2 and OUT2Q to GND1B and

GND2B respectively. These matching resistors are not

needed in most applications.

handbook, halfpage

12 pF 420 Ω

IN1, IN2

IN1Q, IN2Q

50 Ω

50 Ω

VCC1A,

VCC2A

GND1A,

MGS555 GND2A

Fig.6 RF input circuit.

Postamplifier level adjustment

The postamplifier boosts the signal up to PECL levels. The

output can be either CML- or PECL-level compatible,

adjusted by means of the voltage on pins LEVEL1

and LEVEL2. The DC voltages of pins OUT1 and OUT1Q,

and pins OUT2 and OUT2Q match with the DC-levels

on pins LEVEL1 and LEVEL2, respectively. Due to the

receiving end 50 Ω load resistance, it means that at the

same level of Vo(p-p), VLEVEL1 and VLEVEL2 with

AC-coupling are not equal to VLEVEL1 and VLEVEL2 with

DC-coupling (see Figs 7 and 8).

When pin LEVEL1 or LEVEL2 is connected to VCC or not

connected, the postamplifier is in power-down state

(see Fig.7).

Postamplifier DC offset cancellation loop

Offset control loops connected between the inputs of the

buffers A1A and A2A and the outputs of the amplifiers A1B

and A2B (see Figs 1, 2 and 3) will keep the input of both

buffers at their toggle point during the absence of an input

signal. The active offset compensation circuit is integrated,

so no external capacitor is required. The loop time

constant determines the lower cut-off frequency of the

amplifier chain. The cut-off frequency of the offset

compensations is fixed internally at approximately 5 kHz.

2001 Jun 25

9

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