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2N7002K-AU 查看數據表(PDF) - PANJIT INTERNATIONAL

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2N7002K-AU Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
2N7002K-AU
60V N-Channel Enhancement Mode MOSFET - ESD Protected
FEATURES
• RDS(ON), VGS@10V,IDS@500mA=3Ω
• RDS(ON), VGS@4.5V,IDS@200mA=4Ω
SOT-23
• Advanced Trench Process Technology
• High Density Cell Design For Ultra Low On-Resistance
• Very Low Leakage Current In Off Condition
• Specially Designed for Battery Operated Systems, Solid-State Relays
Drivers : Relays, Displays, Lamps, Solenoids, Memories, etc.
• ESD Protected 2KV HBM
• Acqire quality system certificate : TS16949
AEC-Q101 qualified
Lead free in comply with EU RoHS 2002/95/EC directives.
• Green molding compound as per IEC61249 Std. . (Halogen Free)
MECHANICAL DATA
• Case: SOT-23 Package
• Terminals : Solderable per MIL-STD-750,Method 2026
• Apporx. Weight: 0.0003 ounces, 0.0084 grams
• Marking : K72
0.120(3.04)
0.110(2.80)
0.056(1.40)
0.047(1.20)
0.079(2.00)
0.070(1.80)
0.004(0.10)
0.000(0.00)
0.020(0.50)
0.013(0.35)
Unitinch(mm)
0.008(0.20)
0.003(0.08)
0.044(1.10)
0.035(0.90)
Maximum RATINGS and Thermal Characteristics (TA=25OC unless otherwise noted )
Drain-Source Voltage
PARAMETER
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current 1)
Maxi mum Power Di ssi pation
O p e ra t i ng J unc t i o n a nd S t o ra g e Te mp e r a tur e Ra ng e
Junction-to Ambient Thermal Resistance(PCB mounted)2
S ym b o l
V DS
V GS
ID
TA= 2 5 OC
TA= 7 5 OC
IDM
PD
TJ,TSTG
RθJA
Limit
60
+20
300
2000
350
210
-55 to + 150
357
Uni ts
V
V
mA
mA
mW
OC
OC /W
Note: 1. Maximum DC current limited by the package
2. Surface mounted on FR4 board, t < 5 sec
PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE
October 29,2010-REV.02
PAGE . 1

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