74ALVT16652 查看數據表（PDF） - Philips Electronics

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74ALVT16652

2.5V/3.3V 16-bit bus transceiver/register (3-State)

Philips Electronics 

Philips Semiconductors

2.5V/3.3V 16-bit bus transceiver/register

(3-State)

LOGIC DIAGRAM

nOEBA

nOEAB

nCPBA

nSBA

nCPAB

nSAB

nA0

1of 8 Channels

1D

C1

Q

1D

C1

Q

Product specification

74ALVT16652

nB0

nA1

nB1

nA2

nB2

nA3

nB3

nA4

DETAIL A X 7

nB4

nA5

nB5

nA6

nB6

nA7

nB7

SH00065

FUNCTION TABLE

nOEAB

nOEBA

INPUTS

nCPAB nCPBA nSAB nSBA

DATA I/O

nAx

nBx

OPERATING MODE

L

L

H

H or L

H or L

X

X

H

↑

↑

X

X

Input

Input

Isolation

Store A and B data

X

H

H

H

↑

H or L

X

X

↑

↑

**

X

Input

Unspecified

output*

Store A, Hold B

Store A in both registers

L

L

X

H or L

↑

L

↑

↑

X

X

X Unspecified

**

output*

Input

Hold A, Store B

Store B in both registers

L

L

L

L

X

X

X

X

L

H or L

X

H

Output

Input

Real time B data to A bus

Stored B data to A bus

H

H

H

X

X

H

H or L

X

L

X

H

X

Input

Output

Real time A data to B bus

Store A data to B bus

H

L

H or L

H or L

H

H

Output

Output

Stored A data to B bus

Stored B data to A bus

H=

L=

X=

↑=

*

**

High voltage level

Low voltage level

Don’t care

Low-to-High clock transition

The data output function may be enabled or disabled by various signals at the nOEBA and nOEAB inputs. Data input functions are

always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock.

If both Select controls (nSAB and nSBA) are Low, then clocks can occur simultaneously. If either Select control is High, the clocks must

be staggered in order to load both registers.

1998 Feb 13

4

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