SA25F020LMLX 查看數據表（PDF） - Saifun Semiconductors

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SA25F020LMLX

2Mb Serial Flash with 25MHz SPI Bus Interface

Saifun Semiconductors 

List of Figures

Figure 1. SA25F020 Block Diagram ................................ 5

Figure 2. SOIC 8 (150 mil)/PDIP/MLF Package

(Top View) ............................................................. 6

Figure 3. SA25F020 Ordering Information....................... 7

Figure 4. SPI Mode 0 (0,0) Input Timing........................ 11

Figure 5. SPI Mode 0 (0,0) Output Timing ..................... 11

Figure 6. AC Measurements I/O Waveform................... 12

Figure 7. Supported SPI Modes .................................... 14

Figure 8. Hold Condition................................................ 15

Figure 9. SPI Serial Interface ........................................ 17

Figure 10. Read Status Register (RDSR) Instruction

Sequence ............................................................ 19

Figure 11. Write Enable (WREN) Instruction Sequence 20

Figure 12. Write Disable (WRDI) Instruction Sequence. 20

Figure 13. Write Status Register (WRSR) Instruction

Sequence ............................................................ 22

Figure 14. Read (READ) Instruction Sequence ............. 23

Figure 15. Fast Read (FAST_READ) Instruction

Sequence ............................................................ 24

Figure 16. Page Programming (PP) Instruction

Sequence ............................................................ 26

Figure 17. Page Erase (PE) Instruction Sequence ........ 27

Figure 18. Sector Erase (SE) Instruction Sequence ...... 28

SA25F020 Advanced Information

SAIFUN

4

Figure 19. Bulk Erase (BE) Instruction Sequence.......... 29

Figure 20. Software Protection Instruction Sequence .... 30

Figure 21. Release from Software Protect (RES) Instruction

Sequence ............................................................ 31

Figure 22. Release from Software Protection and Read

Electronic Signature (RES) Instruction Sequence 32

Figure 23. 8-pin SOIC Package..................................... 34

Figure 24. 8-pin MLF Leadless Package ....................... 35

Figure 25. Molded Dual-in-line Package (N) Package

Number N08E...................................................... 36

List of Tables

Table 1. Memory Organization ........................................ 5

Table 2. Pin Names......................................................... 6

Table 3. DC Characteristics............................................. 9

Table 4. AC Test Conditions.......................................... 10

Table 5. AC Measurements........................................... 12

Table 6. Instruction Set ................................................. 17

Table 7. Status Register Format.................................... 18

Table 8. Read Status Register Definition....................... 18

Table 9. Block Write Protect Bits................................... 21

Table 10. WPBEN Operation ........................................ 21

Table 11. Powerup ........................................................ 33

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