2SJ601 查看數據表（PDF） - NEC => Renesas Technology
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2SJ601 Datasheet PDF : 8 Pages
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2SJ601
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
Zero Gate Voltage Drain Current
Gate Leakage Current
Gate Cut-off Voltage
Forward Transfer Admittance Note
Drain to Source On-state Resistance Note
IDSS
IGSS
VGS(off)
| yfs |
RDS(on)1
VDS = –60 V, VGS = 0 V
VGS = m20 V, VDS = 0 V
VDS = –10 V, ID = –1 mA
VDS = –10 V, ID = –18 A
VGS = –10 V, ID = –18 A
RDS(on)2 VGS = –4.0 V, ID = –18 A
Input Capacitance
Ciss
VDS = –10 V
Output Capacitance
Coss
VGS = 0 V
Reverse Transfer Capacitance
Crss
f = 1 MHz
Turn-on Delay Time
td(on)
ID = –18 A
Rise Time
tr
VGS = –10 V
Turn-off Delay Time
td(off)
VDD = –30 V
Fall Time
tf
RG = 0 Ω
Total Gate Charge
QG
VDD = –48 V
Gate to Source Charge
QGS
VGS = –10 V
Gate to Drain Charge
Body Diode Forward Voltage Note
QGD
VF(S-D)
ID = –36 A
IF = 36 A, VGS = 0 V
Reverse Recovery Time
Reverse Recovery Charge
Note Pulsed
trr
IF = 36 A, VGS = 0 V
Qrr
di/dt = 100 A/µs
MIN.
–1.5
15
TYP.
–2.0
30
25
32
3300
580
230
11
12
80
53
63
10
16
1.0
52
108
MAX.
–10
m10
–2.5
31
46
UNIT
µA
µA
V
S
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
RG = 25 Ω
L
PG.
50 Ω
VDD
VGS = −20 → 0 V
−
IAS BVDSS
VDS
ID
VDD
Starting Tch
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
RG
PG.
VGS(−)
0
τ
τ = 1 µs
Duty Cycle ≤ 1%
RL
VDD
VGS(−)
VGS
Wave Form
10%
0
VDS(−)
90%
VDS
VDS
Wave Form 0
td(on)
VGS
90%
90%
10% 10%
tr td(off)
tf
ton
toff
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
IG = −2 mA
RL
PG.
50 Ω
VDD
2
Data Sheet D14646EJ4V0DS
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