CHA2098B 查看數據表（PDF） - United Monolithic Semiconductors
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CHA2098B Datasheet PDF : 8 Pages
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20-40GHz High Gain Buffer Amplifier
CHA2098b
Typical Bias Tuning
The circuit schematic is given below :
Vd1
IN
Vd 2,3
OUT
Vg1
Vg 2
Vg 3
For typical operation, the three drain biases are connected altogether. In a same way, all the gate
biases are connected together at the same power supply, tuned to drive a small signal operating
current of 130mA. A separate access to the gate voltages of each stage ( Vg1,2&3 ) is provided for the
fine tuning of the stages regarding the application.
Ref. : DSCHA20981233 21-August-01
7/8
Specifications subject to change without notice
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