2SK3668 查看數據表（PDF） - NEC => Renesas Technology

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2SK3668

SWITCHING N-CHANNEL POWER MOS FET

NEC => Renesas Technology 

2SK3668

ELECTRICAL CHARACTERISTICS (TA = 25°C)

CHARACTERISTICS

SYMBOL

TEST CONDITIONS

Zero Gate Voltage Drain Current

IDSS

VDS = 400 V, VGS = 0 V

Gate Leakage Current

IGSS

VGS = ±30 V, VDS = 0 V

Gate Cut-off Voltage

5 Forward Transfer Admittance Note

5 Drain to Source On-state Resistance Note

VGS(off)

| yfs |

RDS(on)

VDS = 10 V, ID = 1.0 mA

VDS = 10 V, ID = 5.0 A

VGS = 10 V, ID = 5.0 A

Input Capacitance

Ciss

VDS = 10 V

Output Capacitance

Coss

VGS = 0 V

Reverse Transfer Capacitance

Crss f = 1.0 MHz

Turn-on Delay Time

td(on)

VDD = 150 V, ID = 5.0 A

Rise Time

tr

VGS = 10 V

Turn-off Delay Time

td(off)

RG = 10 Ω

Fall Time

tf

Total Gate Charge

QG

VDD = 320 V

Gate to Source Charge

QGS

VGS = 10 V

Gate to Drain Charge

Body Diode Forward Voltage Note

QGD

VF(S-D)

ID = 10 A

IF = 10 A, VGS = 0 V

Reverse Recovery Time

trr

IF = 10 A, VGS = 0 V

Reverse Recovery Charge

Qrr

di/dt = 100 A/µs

Note Pulsed: PW ≤ 800 µs, Duty Cycle ≤ 2%

MIN.

2.5

3.0

TYP.

5.6

0.40

1320

230

13

18

8

44

4

26

7

11

0.90

350

2.7

MAX.

100

±100

3.5

0.55

UNIT

µA

nA

V

S

Ω

pF

pF

pF

ns

ns

ns

ns

nC

nC

nC

V

ns

µC

TEST CIRCUIT 1 AVALANCHE CAPABILITY

D.U.T.

RG = 25 Ω

L

PG.

50 Ω

VDD

VGS = 20 → 0 V

ID

VDD

IAS BVDSS

VDS

Starting Tch

TEST CIRCUIT 2 SWITCHING TIME

D.U.T.

RG

PG.

VGS

0

τ

τ = 1 µs

Duty Cycle ≤ 1%

RL

VGS

VGS

Wave Form

10%

0

VGS

90%

VDD

ID

90%

ID

ID

0 10%

Wave Form

90%

10%

td(on) tr td(off) tf

ton

toff

TEST CIRCUIT 3 GATE CHARGE

D.U.T.

IG = 2 mA

RL

PG.

50 Ω

VDD

2

Data Sheet D16547EJ2V0DS

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