M48Z128Y 查看數據表（PDF） - STMicroelectronics

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M48Z128Y

1 Mbit (128Kb x8) ZEROPOWER SRAM

STMicroelectronics 

M48Z128, M48Z128Y

Table 2. Absolute Maximum Ratings (1)

Symbol

Parameter

Value

Unit

TA

Ambient Operating Temperature

0 to 70

°C

TSTG

Storage Temperature (VCC Off)

–40 to 70

°C

TBIAS

Temperature Under Bias

–10 to 70

°C

TSLD (2)

Lead Solder Temperature for 10 seconds

260

°C

VIO

Input or Output Voltages

–0.3 to 7

V

VCC

Supply Voltage

–0.3 to 7

V

Note: 1. Stresses greater than those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress

rating only and functional operation of the device at these or any other conditions above those indicated in the operational section

of this specification is not implied. Exposure to the absolute maximum rating conditions for extended periods of time may affect

reliability.

2. Soldering temperature not to exceed 260°C for 10 seconds (total thermal budget not to exceed 150°C for longer than 30 seconds).

CAUTION: Negative undershoots below –0.3V are not allowed on any pin while in the Battery Back-up mode.

Table 3. Operating Modes

Mod e

VCC

E

G

Deselect

Write

Read

Read

4.75V to 5.5V

or

4.5V to 5.5V

VIH

X

VIL

X

VIL

VIL

VIL

VIH

Deselect

VSO to VPFD (min)

X

X

Deselect

≤ VSO

X

X

Note: 1. X = VIH or VIL; VSO = Battery Back-up Switchover Voltage.

W

DQ0-DQ7

Power

X

High Z

VIL

DIN

VIH

DOUT

VIH

High Z

Standby

Active

Active

Active

X

High Z

CMOS Standby

X

High Z Battery Back-up Mode

Figure 2. DIP Connections

NC

A16

A14

A12

A7

A6

A5

A4

A3

A2

A1

A0

DQ0

DQ1

DQ2

VSS

1

32

2

31

3

30

4

29

5

28

6

27

7

26

8 M48Z128 25

9 M48Z128Y 24

10

23

11

22

12

21

13

20

14

19

15

18

16

17

VCC

A15

NC

W

A13

A8

A9

A11

G

A10

E

DQ7

DQ6

DQ5

DQ4

DQ3

AI01195

2/17

DESCRIPTION

The M48Z128/128Y ZEROPOWER® RAM is a

128 Kbit x8 non-volatile static RAM that integrates

power-fail deselect circuitry and battery control

logic on a single die. The monolithic chip is avail-

able in two special packages to provide a highly in-

tegrated battery backed-up memory solution.

The M48Z128/128Y is a non-volatile pin and func-

tion equivalent to any JEDEC standard 128K x8

SRAM. It also easily fits into many ROM, EPROM,

and EEPROM sockets, providing the non-volatility

of PROMs without any requirement for special

write timing or limitations on the number of writes

that can be performed. The 32 pin 600mil DIP

Module houses the M48Z128/128Y silicon with a

long life lithium button cell in a single package.

For surface mount environments ST provides a Chip

Set solution consisting of a 28 pin 330mil SOIC

NVRAM Supervisor (M40Z300) and a 32 pin TSOP

(8 x 20mm) LPSRAM (M68Z128) packages.

The 28 pin 330mil SOIC provides sockets with

gold plated contacts at both ends for direct con-

nection to a separate SNAPHAT housing contain-

ing the battery.

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