3D7408-5 查看數據表（PDF） - Data Delay Devices
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3D7408-5 Datasheet PDF : 7 Pages
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3D7408
DEVICE SPECIFICATIONS
TABLE 3: ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL MIN
MAX UNITS NOTES
DC Supply Voltage
VDD
-0.3
7.0
V
Input Pin Voltage
VIN
-0.3
VDD+0.3
V
Input Pin Current
IIN
-10
10
mA
25C
Storage Temperature
TSTRG
-55
150
C
Lead Temperature
TLEAD
300
C
10 sec
TABLE 4: DC ELECTRICAL CHARACTERISTICS
(0C to 70C, 4.75V to 5.25V)
PARAMETER
Static Supply Current*
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
High Level Output Current
SYMBOL
IDD
VIH
VIL
IIH
IIL
IOH
Low Level Output Current
IOL
Output Rise & Fall Time
TR & TF
*IDD(Dynamic) = CLD * VDD * F
where: CLD = Average capacitance load/line (pf)
F = Input frequency (GHz)
MIN
2.0
-4.0
4.0
MAX
40
0.8
1.0
1.0
2
UNITS
mA
V
V
µA
µA
mA
mA
ns
NOTES
VIH = VDD
VIL = 0V
VDD = 4.75V
VOH = 2.4V
VDD = 4.75V
VOL = 0.4V
CLD = 5 pf
Input Capacitance = 10 pf typical
Output Load Capacitance (CLD) = 25 pf max
TABLE 5: AC ELECTRICAL CHARACTERISTICS
(0C to 70C, 4.75V to 5.25V)
PARAMETER
SYMBOL MIN TYP MAX
UNITS
NOTES
Clock Frequency
Enable Width
fC
tEW
10
80
MHz
ns
Clock Width
tCW
10
ns
Data Setup to Clock
tDSC
10
ns
Data Hold from Clock
tDHC
3
ns
Data Setup to Enable
tDSE
10
ns
Data Hold from Enable
tDHE
3
ns
Enable to Serial Output Valid
Enable to Serial Output High-Z
Clock to Serial Output Valid
Clock to Serial Output Invalid
tEQV
tEQZ
tCQV
tCQX
10
20
ns
20
ns
20
ns
ns
Enable Setup to Clock
tES
10
ns
Enable Hold from Clock
tEH
10
ns
Parallel Input Valid to Delay Valid
tPDV
20 40
ns
1
Parallel Input Change to Delay Invalid
tPDX
0
ns
1
Enable to Delay Valid
tEDV
35 45
ns
1
Enable to Delay Invalid
tEDX
0
ns
1
Input Pulse Width
Input Period
tWI
8
Period 20
% of Total Delay See Table 1
% of Total Delay See Table 1
Input to Output Delay
tPLH, tPHL
ns
See Table 2
NOTES: 1 - Refer to PROGRAMMED DELAY (ADDRESS) UPDATE section
Doc #96003
DATA DELAY DEVICES, INC.
6
12/2/96
Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com
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