DSP56F801E 查看數據表（PDF） - Motorola => Freescale

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DSP56F801E

16-bit Hybrid Controller

Motorola => Freescale 

Freescale Semiconductor, Inc.

Data Sheet Conventions

1.5 Data Sheet Conventions

This data sheet uses the following conventions:

OVERBAR

This is used to indicate a signal that is active when pulled low. For example, the RESET pin is

active when low.

“asserted”

A high true (active high) signal is high or a low true (active low) signal is low.

“deasserted” A high true (active high) signal is low or a low true (active low) signal is high.

Examples:

Signal/Symbol

Logic State

Signal State

Voltage1

PIN

True

Asserted

VIL/VOL

PIN

False

Deasserted

VIH/VOH

PIN

True

Asserted

VIH/VOH

PIN

False

Deasserted

1. Values for VIL, VOL, VIH, and VOH are defined by individual product specifications.

VIL/VOL

Part 2 Signal/Connection Descriptions

2.1 Introduction

The input and output signals of the 56F801 are organized into functional groups, as shown in Table 2 and

as illustrated in Figure 2. In Table 3 through Table 13, each table row describes the signal or signals

present on a pin.

Table 2. Functional Group Pin Allocations

Functional Group

Power (VDD or VDDA)

Ground (VSS or VSSA)

Supply Capacitors

PLL and Clock

Interrupt and Program Control

Pulse Width Modulator (PWM) Port

Serial Peripheral Interface (SPI) Port1

Serial Communications Interface (SCI) Port1

Analog-to-Digital Converter (ADC) Port

Quad Timer Module Port

JTAG/On-Chip Emulation (OnCE)

1. Alternately, GPIO pins

Number of

Pins

5

6

2

2

2

7

4

2

9

3

6

Detailed

Description

Table 3

Table 4

Table 5

Table 6

Table 7

Table 8

Table 9

Table 10

Table 11

Table 12

Table 13

56F801 Technical Data

5

For More Information On This Product,

Go to: www.freescale.com

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